公开(公告)号：DE3942431C2

公开(公告)日：1991-09-26

申请号：DE3942431

申请日：1989-12-21

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, DAEJEON, KR ,  KOREA TELECOMMUNICATION AUTHORITY, SEOUL/SOUL, KR

Inventor： LEE, BHUM CHEOL, CHUNGNAM, KR ,  PARK, KWON CHUL, DAEJEON, KR

IPC: H03L7/00 ,  H04L7/00 ,  H04L7/027 ,  H04L7/033 ,  H04L25/40

Abstract: A frequency and phase detection circuit in an NRZ bit synchronous system by simultaneously retiming an NRZ input with an in-phase clock and an inverse-phase clock, respectively. A first frequency and phase difference is extracted by supplying the retimed NRZ with the in-phase clock and the delay-compensated NRZ input to an exclusive OR-gate. A second frequency and phase difference is extracted by supplying the retimed NRZ with the inverse-phase clock and the retimed NRZ with the in-phase clock to another exclusive OR-gate.

公开(公告)号：DE4010889C2

公开(公告)日：1992-09-03

申请号：DE4010889

申请日：1990-04-04

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, DAEJEON, KR ,  KOREA TELECOMMUNICATION AUTHORITY, SEOUL/SOUL, KR

Inventor： SANG-BAE, KIM, DAEJEON, KR

IPC: H01S5/00 ,  H01S5/227 ,  H01S5/30

Abstract: A method for manufacturing a buried heterostructure laser diode comprising an active layer and a clad layer which are formed as a reverse mesa on a substrate, current blocking layers and an insulation layer deposited on the top of the blocking layers, and an electrode formed on the top thereof comprising: a first step for forming a SiO2 stripe mask on the clad layer after a first liquid phase epitaxial growth of the active layer and the clad layer on the substrate, a second step for etching the clad layer under the SiO2 stripe mask using an etchant to form a reverse mesa structure, a third step for selectively etching the clad layer using an etchant such as a family of hydrochloric acid and then for making the active layer protrude, and a fourth step for naturally melthig back the protruded porting of the active layer surface during the second epitaxial growth process is provided.

公开(公告)号：DE4018898C2

公开(公告)日：1992-08-20

申请号：DE4018898

申请日：1990-06-13

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, DAEJEON, KR ,  KOREA TELECOMMUNICATION AUTHORITY, SEOUL/SOUL, KR

Inventor： SHIN, DONG KWAN, SEOUL/SOUL, KR

IPC: H03L7/06 ,  H03K7/06 ,  H03L7/081 ,  H03L7/089 ,  H04J3/06 ,  H04L7/00 ,  H04L7/033 ,  H04L25/40

Abstract: This invention provides a digital auto-phase-controlled retiming circuit which automatically locates the retiming clock phase in the center of input data eye pattern by detesting the phase difference between retiming clock and data and tracking adoptively the mutual phase variation in a case that the mutual phase difference between data and retiming clock is uncertain and changes according to time in digital transmission and/or digital signal processing systems.