公开(公告)号：US20060292435A1

公开(公告)日：2006-12-28

申请号：US11161076

申请日：2005-07-22

Applicant: Yung-Yi LIU ,  James SHANG ,  Shing-Fun Ho ,  Yi-Chen Chen

Inventor： Yung-Yi LIU ,  James SHANG ,  Shing-Fun Ho ,  Yi-Chen Chen

IPC: H01M4/86

CPC classification number: H01M8/2455 ,  H01M4/8807 ,  H01M4/8817 ,  H01M4/8853 ,  H01M8/1011 ,  H01M8/1097 ,  H01M8/2475 ,  H05K1/16 ,  H05K3/427 ,  H05K3/429 ,  Y02E60/523 ,  Y02P70/56

Abstract: A novel flat panel DMFC (direct methanol fuel cell) includes an integrated cathode electrode plate, a membrane electrode assembly (MEA) unit, an intermediate bonding layer, an integrated anode electrode plate, and a fuel container. The integrated cathode and anode electrode plates are manufactured by using PCB compatible processes. The integrated cathode and anode electrode plates have embedded metal layout and improved heat dissipation capability.

公开(公告)号：US20060040169A1

公开(公告)日：2006-02-23

申请号：US10908158

申请日：2005-04-29

Applicant: Yung-Yi LIU ,  James SHANG ,  Shing-Fun Ho ,  Tsang-Ming CHANG ,  Feng-Yi DENG ,  Hsi-Ming SHU

Inventor： Yung-Yi LIU ,  James SHANG ,  Shing-Fun Ho ,  Tsang-Ming CHANG ,  Feng-Yi DENG ,  Hsi-Ming SHU

IPC: H01M4/86 ,  H01M8/10 ,  H01M2/08 ,  H01M8/24 ,  H01M4/96 ,  H01M4/88

CPC classification number: H01M8/2418 ,  H01M4/8657 ,  H01M8/0273 ,  H01M8/1011 ,  H01M8/1097 ,  H01M8/2404 ,  H01M8/246 ,  Y02E60/523 ,  Y02P70/56

Abstract: A flat panel direct methanol fuel cell (DMFC) includes an integrated cathode electrode plate, a set of membrane electrode assemblies, an intermediate bonding layer, an integrated anode electrode plate, and a fuel container base. The integrated cathode/anode electrode plates are conducive to mass production, and are manufactured by using PCB compatible processes.

Abstract translation: 平板直接甲醇燃料电池（DMFC）包括集成阴极电极板，一组膜电极组件，中间粘合层，集成阳极电极板和燃料容器基座。 集成阴极/阳极电极板有利于批量生产，并通过使用PCB兼容工艺制造。

公开(公告)号：US07524429B2

公开(公告)日：2009-04-28

申请号：US11610512

申请日：2006-12-14

Applicant: Hung-En Hsu ,  Binwei Wang ,  Shing-Fun Ho

Inventor： Hung-En Hsu ,  Binwei Wang ,  Shing-Fun Ho

IPC: H01B13/00

CPC classification number: H05K3/426 ,  H05K3/0032 ,  H05K3/108 ,  H05K3/181 ,  H05K3/243 ,  H05K3/28 ,  H05K3/381 ,  H05K2203/1152 ,  Y10T29/49155

Abstract: The present invention provides a method of manufacturing a double-sided printed circuit board. An insulation substrate is first formed by creating a plurality of through holes on a Copper Clad Laminate (CCL) whose copper foil surface has been removed. Next, an electro-less copper layer is plated on the substrate for forming a plurality of plated through holes. After a wire pattern is formed on the substrate, a solder preventive layer is formed on top of the wire pattern. Next, a plurality of openings is created in between the solder preventive layer for exposing the contact pads. Finally, a protective layer is plated on top of the contact pads.

Abstract translation: 本发明提供一种制造双面印刷电路板的方法。 首先通过在其铜箔表面被去除的铜包覆层（CCL）上形成多个通孔来形成绝缘基板。 接着，在基板上电镀无电镀铜层，形成多个电镀通孔。 在基板上形成线图案之后，在导线图案的顶部形成防焊层。 接下来，在用于暴露接触垫的防焊层之间产生多个开口。 最后，将保护层镀在接触垫的顶部。

公开(公告)号：US20080116569A1

公开(公告)日：2008-05-22

申请号：US11672507

申请日：2007-02-07

Applicant: Cheng-Hung Huang ,  Hsien-Chieh Lin ,  Kuo-Chun Chiang ,  Shing-Fun Ho

Inventor： Cheng-Hung Huang ,  Hsien-Chieh Lin ,  Kuo-Chun Chiang ,  Shing-Fun Ho

IPC: H01L23/34

CPC classification number: H01L23/5389 ,  H01L23/36 ,  H01L24/19 ,  H01L24/24 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A Chip-in Substrate Package (CiSP) includes a double-sided metal clad laminate including a dielectric interposer, a first metal foil laminated on a first side of the dielectric interposer, and a second metal foil laminated on a second side of the dielectric interposer. A recessed cavity is etched into the second metal foil and the dielectric interposer with a portion of the first metal foil as its bottom. A die is mounted within the recessed cavity and makes thermal contact with the first metal foil. A build-up material layer covers the second metal foil and an active surface of the die. The build-up material layer also fills the gap between the die and the dielectric interposer. At least one interconnection layer is provided on the build-up material layer and is electrically connected with a bonding pad disposed on the active surface of the die via a plated through hole.

Abstract translation: 芯片衬底封装（CiSP）包括双面金属敷层层压板，其包括介电插入件，层叠在电介质插入件的第一侧上的第一金属箔和层叠在电介质插入件的第二侧上的第二金属箔 。 凹入的腔被蚀刻到第二金属箔和电介质插入件中，第一金属箔的一部分作为其底部。 模具安装在凹腔内并与第一金属箔热接触。 堆积材料层覆盖第二金属箔和模具的有效表面。 堆积材料层还填充了管芯和电介质插入件之间的间隙。 至少一个互连层设置在积层材料层上，并且通过电镀通孔与设置在管芯的有效表面上的焊盘电连接。