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公开(公告)号：KR1019920007078B1
公开(公告)日：1992-08-24
申请号：KR1019890020671
申请日：1989-12-30
IPC: H04L7/00
Abstract: In space clock board assembly comprising the network synchronizing device of TDX, the two lines of the 16.384 MHz clock pulse CP2 and the frame pulse FP2 of 8 KHz speed having a synchronizing signal with the CP2, respectively are connected to the clock selection mode (2). The clock generator (3) generates a CP3 of 8.192 MHz speed and a CP3D having a phase difference of 90 degree to the CP3 by selecting one line of the two lines. The FP3 of 8 KHz speed having a synchronizing signal with CP3 is transfered to a space switching device through the clock buffer element (6). The clock information is provided at clock selection mode (2) by inspecting the clock interrupt state with clock supervisory means (5) connected to receiver (1).
Abstract translation: 在包括TDX的网络同步装置的太空时钟板组件中，16.384MHz时钟脉冲CP2的两条线和具有CP2的同步信号的8KHz速度的帧脉冲FP2分别连接到时钟选择模式（2 ）。 时钟发生器（3）通过选择两条线路中的一条线，产生8.192MHz速度的CP3和具有与CP3相差90度的CP3D。 具有与CP3同步信号的8KHz速度的FP3通过时钟缓冲器元件（6）传送到空间切换装置。 通过用连接到接收机（1）的时钟监视装置（5）检查时钟中断状态，在时钟选择模式（2）提供时钟信息。
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Patent Agency Ranking
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公开(公告)号：KR1019900005163B1
公开(公告)日：1990-07-20
申请号：KR1019870002207
申请日：1987-03-12
Abstract: A phase detection and matching circuit for network synchronization system in a digital telephone exchange comprises a phaselocked loop having a phase detector (1), a controller (2), a D/A converter (3), a voltage-controlled crystal oscillator (4), and a buffer memory (5) divided into double port memories. The buffer memory includes an address counter for receiving input reference clock from the phase detector and transmitting memory address signal to the double port memories. The output terminals of the double port memories are connected with CPU and I/O circuit of CPU.
Abstract translation: 一种用于数字电话交换机中的网络同步系统的相位检测和匹配电路包括具有相位检测器（1），控制器（2），D / A转换器（3），压控晶体振荡器（4） ）和分为双端口存储器的缓冲存储器（5）。 缓冲存储器包括用于从相位检测器接收输入参考时钟并将存储器地址信号发送到双端口存储器的地址计数器。 双端口存储器的输出端子与CPU的CPU和I / O电路相连。
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公开(公告)号：KR1019930015534A
公开(公告)日：1993-07-24
申请号：KR1019910022459
申请日：1991-12-07
IPC: H04M3/02
Abstract: 본 발명은 전자교환기의 망동기에 관한 것으로서 특히 동기신호 및 클럭공급장치에 관한 것이다.
본 발명은 시스템내의 클럭 주파수를 달리 사용하는 장치등에 대한 동기장치로 사용될 수 있으며, 전전자 교환기의 스페이스 스위치 장치와 하이웨이 데이타 장치에 대한 동기 장치로 사용될 수 있는 효과가 있다. -
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