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公开(公告)号：KR1020150016735A
公开(公告)日：2015-02-13
申请号：KR1020130092547
申请日：2013-08-05
Applicant: 한국전자통신연구원
IPC: H04J3/06
CPC classification number: H04L7/04 , H04J3/0658 , H04W56/001
Abstract: 종래에는 계산된 지연 시간이 실제 지연 시간과 차이가 발생하고 이는 시각 오차 값으로 반영되어 시각 동기 성능을 떨어뜨리게 되는 문제점이 있다. 본 발명에서는 네트워크로 연결된 마스터 노드의 클럭으로부터 생성된 시각 동기 메시지를 데이터 평면을 통해서 전달하는 대신, 통합된 제어 평면을 통해서 네트워크 노드 또는 슬레이브 노드로 전달함으로써, 네트워크 상의 데이터 트래픽의 비대칭성에도 향상된 시각 동기 정밀도를 제공할 수 있다.
Abstract translation: 存在在计算出的延迟时间和实际延迟时间之间产生差异的问题，并且由于差异被反映为现有发明中的时间误差值，所以时间同步功能恶化。 本发明可以通过将由网络连接的主节点的时钟生成的时间同步消息通过集成控制平面传递给网络节点或从节点而提供网络上的数据业务的不对称性来提供时间同步精度，而不是 数据平面。 网络时间同步系统包括主节点，从节点和包括主时钟或从时钟的网络节点。
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公开(公告)号：KR1020140133295A
公开(公告)日：2014-11-19
申请号：KR1020130053286
申请日：2013-05-10
Applicant: 한국전자통신연구원
CPC classification number: G06F9/505 , G06F9/5033 , Y02D10/22
Abstract: 본 발명은 프로세서 배열(array)로 구성된 멀티 프로세서 구조에서 프로세서의 부하 정도에 따라서 플로우 ID의 생성 방식을 다르게 하여 입력 데이터를 병렬 처리하는 데이터 병렬 처리 장치를 제안한다. 본 발명에서 제안된 장치는 입력 데이터에 대하여 버퍼의 상태에 따라 차별된 플로우 ID를 생성하는 플로우 ID 생성부; 동일한 플로우 ID를 가지는 데이터들을 지정된 프로세서로 할당하는 데이터 할당부; 및 각 프로세서에 할당된 데이터들을 순차적으로 처리하는 데이터 처리부를 포함함으로써, 병렬 처리 성능을 종래보다 향상시킬 수가 있다.
Abstract translation: 本发明提出一种并行数据处理装置，其能够通过根据由处理器阵列组成的多处理器结构中的处理器的负载状态来区分流ID的生成方法来并行地处理输入数据。 本发明提出的装置包括：流ID生成单元，根据用于输入数据的缓冲器的状态产生不同的流ID; 数据分配单元，其将具有相同流ID的数据分配给指定的处理器; 以及数据处理单元，其按顺序处理分配给每个处理器的数据。 结果，与传统技术相比，本发明改进了并行处理性能。
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公开(公告)号：KR1020140072668A
公开(公告)日：2014-06-13
申请号：KR1020120140442
申请日：2012-12-05
Applicant: 한국전자통신연구원
IPC: H04N21/238 , H04N7/18
CPC classification number: H04N21/234 , H04N7/181
Abstract: A network camera server connected to a plurality of cameras and user devices via a network allocates a server by flow, divides a plurality of video streams respectively received from the cameras by flow on the basis of a set video parameter, and delivers the video stream divided by flow to the server allocated by flow.
Abstract translation: 通过网络连接到多个摄像机和用户设备的网络摄像机服务器通过流量分配服务器，根据设定的视频参数通过流分别分别从摄像机接收的多个视频流，并将视频流分割 通过流分配给服务器。
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公开(公告)号：KR1020130093707A
公开(公告)日：2013-08-23
申请号：KR1020110141297
申请日：2011-12-23
Applicant: 한국전자통신연구원
CPC classification number: H04L49/3009 , H04L45/7457 , H04L47/2441
Abstract: PURPOSE: A packet classification apparatus and a packet classification method improve a packet treatment rate by being divided into an address-based content-addressable memory part and a text-based content-addressable memory part. CONSTITUTION: A packet processer (110) provides a search key corresponding to classified packet. The search key distributor (120) decodes the search key and classifies an address-based search key and a text-based search key. An address-based content-addressable memory part conducts an address-based search based on the address-based search key. A text-based content-addressable memory part conducts a text-based search based on the text-based search key. A packet forwarding part (150) conducts corrects the information of a packet or discards the packet according to the predetermined rules. [Reference numerals] (110) Packet processor; (120) Search key distributor; (130) Address-based content-addressable memory part; (140) Text-based content-addressable memory part; (150) Packet forwarding part
Abstract translation: 目的：分组分类装置和分组分类方法通过分为基于地址的内容寻址存储器部分和基于文本的内容寻址存储器部分来提高分组处理速率。 构成：分组处理器（110）提供与分类分组对应的搜索关键字。 搜索密钥分发器（120）解码搜索关键字并对基于地址的搜索密钥和基于文本的搜索密钥进行分类。 基于地址的内容寻址存储器部分基于基于地址的搜索关键字进行基于地址的搜索。 基于文本的内容寻址存储器部分基于基于文本的搜索关键字进行基于文本的搜索。 分组转发部分（150）根据预定的规则进行分组的信息的修正或丢弃分组。 （附图标记）（110）分组处理器; （120）搜索键分销商; （130）基于地址的内容寻址存储器部分; （140）基于文本的内容寻址记忆部分; （150）分组转发部分
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公开(公告)号：KR1020120068582A
公开(公告)日：2012-06-27
申请号：KR1020100130271
申请日：2010-12-17
Applicant: 한국전자통신연구원
IPC: H04L7/027
CPC classification number: H04J3/0697 , H04J3/0638 , H04J3/0658 , H04J3/0667 , H04L7/027 , H04L7/00 , H04L7/02
Abstract: PURPOSE: An apparatus and a method for estimating a timestamp are provided to accurately estimate a time stamp value about multiplexed parallel data in a low speed between a layer 1 and a layer 2 by estimating a time stamp value about serial data in a high speed between the layer 2 and a layer 3. CONSTITUTION: An apparatus for estimating a timestamp estimates a time stamp value of an inputted SYNC message(710). The apparatus for estimating the timestamp stores the difference of a time stamp value of a master and a time stamp value of a layer 3 module adjusted by a clock of the master as a current difference value(720). The apparatus for estimating the timestamp compares the currently stored difference with an existing minimum value(730). The apparatus for estimating the timestamp sets the current difference as a minimum value(740). The apparatus for estimating the timestamp maintains an existing minimum value(745). The apparatus for estimating the timestamp adds up a cycle value of the layer 3 module(750) The apparatus for estimating the timestamp calculates an adjusted delay variation value(760).
Abstract translation: 目的：提供一种用于估计时间戳的装置和方法，以通过估计关于串行数据的时间戳值来精确估计关于层1和层2之间的低速的多路并行数据的时间标记值 层2和层3.构成：用于估计时间戳的装置估计输入的SYNC消息的时间戳值（710）。 用于估计时间戳的装置存储由主机的时钟调整的第3层模块的主机的时间戳值和时间戳值的差作为当前差值（720）。 用于估计时间戳的装置将当前存储的差值与现有的最小值进行比较（730）。 用于估计时间戳的装置将电流差设置为最小值（740）。 用于估计时间戳的装置保持现有的最小值（745）。 用于估计时间戳的装置将层3模块的周期值相加（750）。用于估计时间戳的装置计算调整后的延迟变化值（760）。
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Patent Agency Ranking
公开(公告)号：KR1020120053357A
公开(公告)日：2012-05-25
申请号：KR1020100114586
申请日：2010-11-17
Applicant: 한국전자통신연구원
IPC: G06F9/38
CPC classification number: H04L47/18 , G06F9/5027
Abstract: PURPOSE: An apparatus and method for processing multilayer data are provided to improve the processing performance of the multilayer data by processing the multilayer data in parallel through processors. CONSTITUTION: A lower layer processing unit(110) generates a lower layer flow by using input data with lower layer information, allocates the lower layer flow to a plurality of lower layer processors, and processes the lower layer with regard to the lower layer flow in parallel. An upper layer processing unit(120) generates an upper layer flow by using data from the lower layer processor with upper layer information, allocates the upper layer flow to a plurality of upper layer processors, and processes the upper layer with regard to the upper layer flow in parallel.
Abstract translation: 目的：提供一种处理多层数据的设备和方法，通过处理器并行处理多层数据，提高多层数据的处理性能。 构成：下层处理单元（110）通过使用具有较低层信息的输入数据生成下层流，将下层流分配给多个下层处理器，并且相对于下层流处理下层流 平行。 上层处理单元（120）通过使用来自具有上层信息的下层处理器的数据生成上层流，将上层流分配给多个上层处理器，并且相对于上层处理上层 平行流动。
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公开(公告)号：KR1020120008965A
公开(公告)日：2012-02-01
申请号：KR1020100070437
申请日：2010-07-21
Applicant: 한국전자통신연구원 , 연세대학교 산학협력단
CPC classification number: H03B5/1228 , H03K3/0315 , H03L7/0995 , H03M1/66
Abstract: PURPOSE: A high definition low noise digital control oscillator is provided to maintain linearity by producing oscillation frequency changed according to the difference between a first differential motion electric current signal and a second differential motion electric current signal. CONSTITUTION: A digital control oscillator(300) comprises a differential digital-analog converter(310) which creates two differential motion electric current signals by receiving a digital code. The digital control oscillator comprises a differential current control oscillator(320) which creates the oscillation frequency using two differential motion electric current signals. The differential digital-analog converter receives digital codes signal of N bit as an input. The differential digital-analog converter creates the first differential motion electric current signal and the second differential motion electric current signal corresponding to the digital code signal. The differential current control oscillator produces oscillation frequency adaptively controlled according to the difference between the first differential motion electric current signal and the second differential motion electric current signal.
Abstract translation: 目的：提供一种高清晰度低噪声数字控制振荡器，通过产生根据第一差分运动电流信号和第二差分运动电流信号之间的差异而发生的振荡频率来保持线性度。 构成：数字控制振荡器（300）包括差分数模转换器（310），其通过接收数字码产生两个差分电流信号。 数字控制振荡器包括使用两个差分电流信号产生振荡频率的差分电流控制振荡器（320）。 差分数模转换器接收N位的数字码信号作为输入。 差分数模转换器产生对应于数字码信号的第一差动电流信号和第二差分运动电流信号。 差分电流控制振荡器根据第一差动电流信号和第二差分运动电流信号之间的差自适应地控制振荡频率。
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公开(公告)号：KR1020110071588A
公开(公告)日：2011-06-29
申请号：KR1020090128201
申请日：2009-12-21
Applicant: 한국전자통신연구원
CPC classification number: G06F9/5027 , H04L47/2483
Abstract: PURPOSE: A parallel data flow processing device and method is provided to efficiently process the data by referring to the local memory corresponding to the inputted data flow and processing the top layer packet of the data. CONSTITUTION: A bottom layer processing unit(103) distinguishes the flow of the inputted first data. A separator(105) selects the top layer processing unit(107-1~107-n) corresponding to the flow and transmits the first data to the selected top layer processing unit. The top layer processing unit refers to the local memory(109-1~109-n) corresponding to the flow and processes the top layer packet of the first data. The bottom layer processing unit distinguishes the flow by using the bottom layer packet of the first data.
Abstract translation: 目的：提供并行数据流处理设备和方法，通过参考与输入的数据流相对应的本地存储器和处理数据的顶层数据包来有效地处理数据。 构成：底层处理单元（103）区分输入的第一数据的流程。 分离器（105）选择对应于流的顶层处理单元（107-1〜107-n），并将第一数据发送到所选择的顶层处理单元。 顶层处理单元是指与流对应的本地存储器（109-1〜109-n），处理第一数据的顶层数据包。 底层处理单元通过使用第一数据的底层分组区分流。
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公开(公告)号：KR1020110032290A
公开(公告)日：2011-03-30
申请号：KR1020090089711
申请日：2009-09-22
Applicant: 한국전자통신연구원
CPC classification number: G06F9/5083
Abstract: PURPOSE: A parallel processing system and a method thereof are provided to control unnecessary processor operation by operating all processors and to disperse load. CONSTITUTION: A traffic processing performance calculator(110) calculates traffic processing performance based on attribute information of input data. The traffic processing performance calculator determines output time corresponding to data based on traffic processing performance. A load processing determining unit(120) drives one processor according to load based on traffic processing performance. A standby buffer(140) stores processing data and outputs processing data based on output time.
Abstract translation: 目的：提供并行处理系统及其方法，通过操作所有处理器并分散负载来控制不必要的处理器操作。 构成：流量处理性能计算器（110）基于输入数据的属性信息计算流量处理性能。 流量处理性能计算器根据流量处理性能确定与数据相对应的输出时间。 负载处理确定单元（120）基于业务处理性能根据负载驱动一个处理器。 备用缓冲器（140）存储处理数据并基于输出时间输出处理数据。
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20.发明公开액세스 노드와 가입자 게이트웨이, 그리고 이들을 포함하는 다수 사업자용 인터넷 프로토콜 기반 액세스 망에서의 다수 사업자 서비스 제공 방법 有权在基于IP的访问网络中提供多个服务提供商的服务的方法，包括访问节点，用户网关
公开(公告)号：KR1020100074019A
公开(公告)日：2010-07-01
申请号：KR1020090127519
申请日：2009-12-18
Applicant: 한국전자통신연구원
CPC classification number: H04L12/66 , H04L41/5077 , H04L61/2015
Abstract: PURPOSE: A method for supplying IP base service to a plurality of business carriers through a single access net is provided to reduce cost for duplicated network construction. CONSTITUTION: A subscriber gateway assigns the private internet protocol to a terminal(501,502). The subscriber gateway records the information about the service provider selection in the user manager block(506). The intrinsic subscriber or the visiting user connects through the subscriber gateway to the access node(507). The service provider establishes connection with the subscriber gateway(508). The service provider assigns the IP address to the subscriber gateway(510).
Abstract translation: 目的：提供通过单个接入网向多个业务运营商提供IP基服务的方法，以降低重复网络构建的成本。 规定：用户网关将私有网际协议分配给终端（501,502）。 用户网关在用户管理器块（506）中记录关于服务提供商选择的信息。 固有用户或访问用户通过用户网关连接到接入节点（507）。 服务提供商建立与用户网关的连接（508）。 服务提供商将IP地址分配给用户网关（510）。
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