公开(公告)号：US09618566B2

公开(公告)日：2017-04-11

申请号：US14620273

申请日：2015-02-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jeanne P. Bickford ,  Nazmul Habib ,  Baozhen Li ,  Tad J. Wilder

IPC: G01R31/28 ,  G06F21/57 ,  H05K13/08

CPC classification number: G01R31/2851 ,  G01R31/2813 ,  G06F21/575 ,  H05K13/0486 ,  H05K13/08

Abstract: In the systems and methods, an identifier is generated for a printed circuit board (PCB), chips are connected to the PCB, and corresponding sets of programmable bits on the chips are programmed to match specific sections of the identifier. Due to the generation of the identifier and the programming of the corresponding sets of programmable bits on the chips to match specific sections of the identifier, the validity of the chips can be verified at any time during product life. For example, for each chip, its set of programmable bits can be read and, then, a determination can be made as to whether that set of programmable bits is indeed programmed to match a specific section of the identifier. Operation of the PCB can be allowed when all the chips are determined to be valid and prohibited when any of the chips are determined to be invalid (e.g., previously used).

公开(公告)号：US20180102318A1

公开(公告)日：2018-04-12

申请号：US15291275

申请日：2016-10-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Cathryn J. Christiansen ,  Hanyi Ding ,  Baozhen Li

IPC: H01L23/522 ,  H01L23/525 ,  H01L23/528 ,  H01L49/02 ,  H01L23/367 ,  H01L21/768 ,  H01L21/48

Abstract: A compound resistor structure can use multiple electrically conductive pads connected by resistive elements to provide the equivalent resistance of a conventional resistor while spreading generated heat over a larger area. An array of pads and resistive elements can create larger resistances, metal connectors between rows of pads allowing current to flow from a first pad in a first row to a last pad in a last row via pads and resistive elements in each row. Fuses connecting pads in such an array can be included to allow tuning of resistance and/or other electrical properties.

公开(公告)号：US20170309573A1

公开(公告)日：2017-10-26

申请号：US15646325

申请日：2017-07-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anthony K. Stamper ,  Baozhen Li

IPC: H01L23/532 ,  H01L23/528 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/53238 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76865 ,  H01L21/76883 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53257

Abstract: Aspects of the present disclosure include interconnect structures for an integrated circuit (IC) structure and methods of making the same. The interconnect structures include one or more electronic devices formed on a substrate. A first interlevel dielectric (ILD) layer is over the one or more electronic devices. The interconnect structure includes a first trench in the first ILD layer. A tungsten contact fills the first trench and is in electrical contact with the one or more electronic devices. A second ILD layer is over the first ILD layer. The interconnect structure includes a second trench in the second ILD layer. Diffusion barrier liners bound all sides of the second trench except at a surface of the tungsten contact. The interconnect structure includes a copper wire filling the second trench, the copper wire in direct contact with the tungsten contact and with the diffusion barrier liners.

公开(公告)号：US20160240479A1

公开(公告)日：2016-08-18

申请号：US14624907

申请日：2015-02-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jeanne P. Bickford ,  Nazmul Habib ,  Baozhen Li ,  Tad J. Wilder

IPC: H01L23/525 ,  G01K7/16 ,  H01L23/532 ,  G01N25/00

CPC classification number: G01K7/16 ,  G01L21/30 ,  G01N17/00 ,  G01N27/62 ,  G01N27/64 ,  G01R31/00 ,  H01J41/00 ,  H01J41/02 ,  H01L23/34

Abstract: Aspects of the present disclosure include a computer-implemented method for identifying an operating temperature of an integrated circuit (IC), the method including using a computing device for: applying a test voltage to a test circuit embedded within the IC, the test circuit including a phase shift memory (PSM) element therein, wherein the PSM element crystallizes at a crystallization temperature from an amorphous phase having a first electrical resistance into a crystalline phase having a second electrical resistance, the second electrical resistance being less than the first electrical resistance; and identifying the IC as having operated above the crystallization temperature in response to a resistance of the test circuit at the test voltage being outside of the target operating range.

Abstract translation: 本公开的方面包括用于识别集成电路（IC）的工作温度的计算机实现的方法，所述方法包括使用计算设备：将测试电压施加到嵌入在所述IC内的测试电路，所述测试电路包括 在其中的相移存储器（PSM）元件，其中所述PSM元件在结晶温度下从具有第一电阻的非晶相结晶成具有第二电阻的晶相，所述第二电阻小于所述第一电阻; 以及响应于所述测试电压在所述测试电压处于目标工作范围之外的电阻而将所述IC识别为高于所述结晶温度的IC。