Intelligente Schreibcacheoperation für sequenzielle Datenspuren

    公开(公告)号:DE112011103290T5

    公开(公告)日:2013-07-11

    申请号:DE112011103290

    申请日:2011-08-18

    Applicant: IBM

    Abstract: In einer Datenverarbeitungsspeicherumgebung zum Auslagern von Daten von einem Permanentspeicher (NVS) zu einer Speichereinheit werden Schreibcacheoperationen für sequenzielle Datenspuren durch eine Prozessoreinheit bereitgestellt. Wenn festgestellt wird, dass eine erste Datenspur sequenziell ist, und wenn festgestellt wird, dass auch eine frühere Datenspur ebenfalls sequenziell ist, wird ein temporäres Bit, das der früheren Datenspur zugehörig ist, gelöscht, um das Auslagern von Daten der früheren Datenspur zu ermöglichen. Wenn festgestellt wird, dass ein temporäres Bit für eine aus einer Vielzahl von weiteren Datenspuren in einem Abschnitt aus einer Vielzahl von Abschnitten in einem geänderten Cachespeicher nicht gesetzt ist, wird für eine Auslagerungsoperation ein Abschnitt ausgewählt, der der einen aus der Vielzahl weiterer Datenspuren zugehörig ist. Wenn der NVS einen vorgegebenen Speicherschwellenwert überschreitet, wird ein vorgegebener Abschnitt aus der Vielzahl von Abschnitten für die Auslagerungsoperation ausgewählt.

    12.
    发明专利
    未知

    公开(公告)号:DE69122337T2

    公开(公告)日:1997-06-05

    申请号:DE69122337

    申请日:1991-07-08

    Applicant: IBM

    Abstract: Apparatus is disclosed for controlling a disk drive or DASD in a manner that is not synchronous with channel operation, that is, transfer of commands and data are not limited to inter-record gaps periods. A device interface processor controls which recording track is accessed by the DASD with data being transferred to and from a buffer. A device track indicator designates which recording tracks the device will move to in sequence. A channel interface processor controls the movement of data from and to the buffer and channel. A channel track indicator designates the recording track sequence in which the channel interface processor will access the data to be transferred. A method of operation is also disclosed for utilizing the two indicators to enable the device and channel processors to communicate with each other in case the device reads incorrect records in a multi-track read operation.

    Managing cache destage scan times
    15.
    发明专利

    公开(公告)号:GB2499968B

    公开(公告)日:2014-01-29

    申请号:GB201312203

    申请日:2011-11-29

    Applicant: IBM

    Abstract: A system includes a cache and a processor. The processor is configured to utilize a first thread to continually determine a desired scan time for scanning the plurality of storage tracks in the cache and utilize a second thread to continually control an actual scan time of the plurality of storage tracks in the cache based on the continually determined desired scan time. One method includes utilizing a first thread to continually determine a desired scan time for scanning the plurality of storage tracks in the cache and utilizing a second thread to continually control an actual scan time of the plurality of storage tracks in the cache based on the continually determined desired scan time.

    16.
    发明专利
    未知

    公开(公告)号:DE602007001242D1

    公开(公告)日:2009-07-16

    申请号:DE602007001242

    申请日:2007-02-16

    Applicant: IBM

    Abstract: Provided are techniques for copying data. A volume container copyset that includes volume containers is received. A volume container copyset that includes volume containers is received. Each of the volume containers is associated with a copyset role, and each of the volume containers includes zero or more volumes, wherein each of the volumes in a volume container has the copyset role of that volume container. Sets of volumes are associated with a replication session, wherein each of the sets of volumes has one volume from each of the volume containers. Each of the sets of volumes has volumes associated with a copyset role that is associated with the volume containers with which each volume is associated. In response to determining that one of membership of one of the volume containers and a size of a volume in one of the volume containers has been modified, one or more corresponding volume containers in the volume container copyset are automatically modified.

    17.
    发明专利
    未知

    公开(公告)号:DE69327892D1

    公开(公告)日:2000-03-30

    申请号:DE69327892

    申请日:1993-08-25

    Applicant: IBM

    Abstract: A storage system controller, coupled to one or more host computers via multiple communication channels, is utilized to control access to one or more direct access storage devices. A host computer authorizes the storage system controller to search within a range of data locations within the storage system, sets an initial location from which the data search will begin, and specifies a key field argument to search for. The host computer then permits the storage system controller to independently search the authorized range of data locations within the storage system or within cache memory within the storage system controller. The storage system controller examines multiple records within the authorized range of data locations to locate a desired record associated with the key field argument and presents a status report to the host computer only after the desired record is located or the entire range of data is searched and the desired record was not located.

    18.
    发明专利
    未知

    公开(公告)号:DE69122337D1

    公开(公告)日:1996-10-31

    申请号:DE69122337

    申请日:1991-07-08

    Applicant: IBM

    Abstract: Apparatus is disclosed for controlling a disk drive or DASD in a manner that is not synchronous with channel operation, that is, transfer of commands and data are not limited to inter-record gaps periods. A device interface processor controls which recording track is accessed by the DASD with data being transferred to and from a buffer. A device track indicator designates which recording tracks the device will move to in sequence. A channel interface processor controls the movement of data from and to the buffer and channel. A channel track indicator designates the recording track sequence in which the channel interface processor will access the data to be transferred. A method of operation is also disclosed for utilizing the two indicators to enable the device and channel processors to communicate with each other in case the device reads incorrect records in a multi-track read operation.

Patent Agency Ranking