11.
    发明专利
    未知

    公开(公告)号:DE2525155A1

    公开(公告)日:1976-01-02

    申请号:DE2525155

    申请日:1975-06-06

    Applicant: IBM

    Abstract: A method and apparatus for the point plotting and rearrangement of graphical data from a coded source into a buffer for raster type display. The execution of a graphic order in a stored program controllable graphics terminal are represented by a line generating a sequence of X Y coordinate values, which values are to be plotted or displayed. The points are plotted into a work organized memory array in the form of topologically adjacent rectangular subarrays. These subarrays are then transformed into linear arrays. In order to conserve memory they directly replace the previous topologically adjacent subarrays in the memory. The linear arrays may then be accessed a word at a time and applied to the raster display.

    14.
    发明专利
    未知

    公开(公告)号:DE69024866D1

    公开(公告)日:1996-02-29

    申请号:DE69024866

    申请日:1990-07-10

    Applicant: IBM

    Abstract: A track-seeking system for an optical disk using a velocity control loop with partially-digitized velocity measurement is described in which the sample period of the position error signal is varied in accordance with a velocity profile and a gain of the digital circuits is adjusted, also in accordance with the velocity profile, for providing optimum operation of the digitized portion of the velocity signal generator. In another aspect of the velocity-signal generation, the same digital circuit generates a velocity reference signal and a velocity error signal from a common desired velocity profile set of values.

    16.
    发明专利
    未知

    公开(公告)号:DE2835871A1

    公开(公告)日:1979-03-08

    申请号:DE2835871

    申请日:1978-08-16

    Applicant: IBM

    Abstract: A major/minor loop bubble domain memory system maintains the non-volatility of data when subjected to a power on-off-on sequence. A bubble domain shift register is associated with the major/minor loop array and indicates when a block of data in the major loop is in position to be transferred into the minor loops. The length of the shift register is related to the propagation delay of the path over which a bubble is propagated along the major loop from a minor loop read transfer switch to the write transfer switch for the same minor loop.

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