公开(公告)号：FR2312884A1

公开(公告)日：1976-12-24

申请号：FR7517189

申请日：1975-05-27

Applicant: IBM FRANCE

Inventor： ESTEBAN DANIEL ,  MENEZ JEAN

IPC: H03M1/12 ,  H03M1/00 ,  H03M3/02 ,  H03M3/04 ,  H03M7/30 ,  H03K13/02

Abstract: 1506361 Block quantization process INTERNATIONAL BUSINESS MACHINES CORP 31 March 1976 [27 May 1975] 12971/76 Heading H3H To minimize error in quantizing a section Sn of N samples of a signal to be represented as where Fn is a bit stream, Q is the quantizing step and Cn a constant or polynomial, the final values of Cn and Q are arrived at iteratively. For one bit quantization a section of samples Sn‹ is loaded on to a recirculating delay line DL1 and presented to a summing point ADD 1 where an initial value Cn‹ gives Sn 1 = Sn‹ - Cn‹, fed to device QUANT producing sign derived bit stream Fn' which together with Sn' is fed to device COMP. This computes values of Cn and Q to minimize error where p is 2 for quadratic error. A new stream Fn is then calculated and the system iterates to reduce errors. For more than onebit quantization device QUANT uses the value of Q to determine Fn. A delta modulation embodiment is described, Fig. 5 (not shown), where the signal encoded Sn is the difference between an incoming signal Xn i and reconstructed signal Xn i-1 .