公开(公告)号：WO2005008742A3

公开(公告)日：2005-06-02

申请号：PCT/US2004022904

申请日：2004-07-15

Applicant: IBM ,  DOYLE GARY R ,  GOODNOW KENNETH J ,  HARDING RIYON W ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

Inventor： DOYLE GARY R ,  GOODNOW KENNETH J ,  HARDING RIYON W ,  KAMPF FRANCIS A ,  NORMAN JASON M ,  VENTRONE SEBASTIAN T

IPC: G02B6/43 ,  G02B6/12

CPC classification number: G02B6/43

Abstract: Disclosed is an integrated circuit comprising a plurality of cores (50 A-B) attached to at least one transmitter (e.g. 20D) and receiver (e.g. 30D), an optical transmission network (e.g. 12A-B) embedded within the wire levels of the integrated circuit, and wherein the transmitter and receivers send and receive data on the network.

Abstract translation: 公开了一种集成电路，其包括附接到至少一个发射器（例如20D）和接收器（例如30D）的多个核（50AB），嵌入集成电路的线级内的光传输网络（例如12A-B） ，并且其中发射机和接收机在网络上发送和接收数据。

公开(公告)号：WO2005038592A2

公开(公告)日：2005-04-28

申请号：PCT/US2004033803

申请日：2004-10-13

Applicant: IBM ,  GOODNOW KENNETH J ,  OGILVIE CLARENCE R ,  REYNOLDS CHRISTOPHER B ,  SMITH JACK R ,  VENTRONE SEBASTIAN T

Inventor： GOODNOW KENNETH J ,  OGILVIE CLARENCE R ,  REYNOLDS CHRISTOPHER B ,  SMITH JACK R ,  VENTRONE SEBASTIAN T

IPC: G06F15/78 ,  H03K19/177 ,  G06F

CPC classification number: H03K19/17752 ,  G06F15/7867 ,  H03K19/17756 ,  H03K19/1776

Abstract: A reconfigurable logic array (RLA) system (104) that includes an RLA (108) and a programmer (112) for reprogramming the RLA on a cyclical basis. A function (F) requiring a larger amount of logic than contained in the RLA is partitioned into multiple functional blocks (FB1, FB2, FB3). The programmer contains software (144) that partitions the RLA into a function region FR located between two storage regions SR1, SR2. The programmer then programs functional region sequentially with the functional blocks of the function so that the functional blocks process in alternating directions between the storage regions. While the programmer is reconfiguring function region with the next functional block and reconfiguring one of the storage regions for receiving the output of the next functional block, data being passed from the current functional block to the next functional block is held in the other storage region.

Abstract translation: 包括RLA（108）和用于在循环基础上重编程RLA的编程器（112）的可重配置逻辑阵列（RLA）系统（104）。 需要比RLA中包含的逻辑量​​更大的函数（F）被分割成多个功能块（FB1，FB2，FB3）。 编程器包含将RLA分割成位于两个存储区域SR1，SR2之间的功能区域FR的软件（144）。 程序员然后用函数的功能块顺序地编程功能区，使得功能块在存储区之间交替方向上处理。 当编程人员用下一个功能块重新配置功能区域并重新配置用于接收下一个功能块的输出的存储区域时，从当前功能块传送到下一个功能块的数据被保存在另一个存储区域中。