公开(公告)号：WO2013186722A2

公开(公告)日：2013-12-19

申请号：PCT/IB2013054813

申请日：2013-06-12

Applicant: IBM ,  IBM UK

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  ROGERS ROBERT

IPC: G06F7/00 ,  G06F17/30

CPC classification number: G06F9/3861 ,  G06F9/3001 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30076 ,  G06F9/30087 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/30181 ,  G06F9/3834 ,  G06F9/466

Abstract: Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.

Abstract translation: 选择性地控制事务环境中的指令的执行。 一个TRANSACTION BEGIN指令启动事务，并且包括有选择地指示某些类型的指令是否被允许在事务内执行的控件。 控制包括允许访问寄存器修改控制和允许浮点操作控制中的一个或多个。

公开(公告)号：WO2009087166A4

公开(公告)日：2009-11-05

申请号：PCT/EP2009050117

申请日：2009-01-07

Applicant: IBM ,  IBM UK ,  GREINER DAN ,  SLEGEL TIMOTHY

Inventor： GREINER DAN ,  SLEGEL TIMOTHY

IPC: G06F9/312

CPC classification number: G06F9/30043 ,  G06F9/30163 ,  G06F9/30167 ,  G06F9/324 ,  G06F9/3557

Abstract: A method, system and program product for loading or storing memory data wherein the address of the memory operand is based an offset of the program counter rather than an explicitly defined address location. The offset is defined by an immediate field of the instruction which is sign extended and is aligned as a halfword address when added to the value of the program counter.

Abstract translation: 一种用于加载或存储存储器数据的方法，系统和程序产品，其中存储器操作数的地址基于程序计数器的偏移而不是明确定义的地址位置。 偏移量由符号扩展的指令的立即字段定义，并在被添加到程序计数器的值时作为半字地址对齐。

公开(公告)号：WO2013186721A3

公开(公告)日：2014-05-30

申请号：PCT/IB2013054812

申请日：2013-06-12

Applicant: IBM ,  IBM UK

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY

IPC: G06F9/46

CPC classification number: G06F9/467 ,  G06F9/3004 ,  G06F9/30087 ,  G06F9/3834

Abstract: A transaction is initiated via a transaction begin instruction. During execution of the transaction, the transaction may abort. If the transaction aborts, a determination is made as to the type of transaction. Based on the transaction being a first type of transaction, resuming execution at the transaction begin instruction, and based on the transaction being a second type, resuming execution at an instruction following the transaction begin instruction. Regardless of transaction type, resuming execution includes restoring one or more registers specified in the transaction begin instruction and discarding transactional stores. For one type of transaction, the nonconstrained transaction, the resuming includes storing information in a transaction diagnostic block.

Abstract translation: 交易通过交易开始指令启动。 交易执行期间，交易可能会中止。 如果交易中止，则确定交易的类型。 基于事务是第一种类型的事务，在事务开始指令中恢复执行，并且基于该事务是第二类型，在事务开始指令之后的指令处恢复执行。 不管交易类型如何，恢复执行包括恢复在事务开始指令中指定的一个或多个寄存器，并丢弃事务存储。 对于一种类型的事务，非约束事务，恢复包括将信息存储在事务诊断块中。

公开(公告)号：WO2013186606A2

公开(公告)日：2013-12-19

申请号：PCT/IB2012056736

申请日：2012-11-26

Applicant: IBM ,  IBM UK

Inventor： GREINER DAN ,  ROGERS ROBERT

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F9/3004 ,  G06F9/3824 ,  G06F12/1009 ,  G06F2212/683

Abstract: A first and a second operand are compared. If they are equal, the contents of register R1 + 1 are stored at the second-operand location, and the specified CPU or CPUs in the configuration are cleared of all TLB table entries of the designated type formed through the use of the replaced entry in storage, and all lower-level TLB table entries formed through the use of the cleared higher-level TLB table entries. A valid DAT table entry is replaced with a new entry, and the Translation Lookaside Buffer (TLB) is purged of any copies of (at least) the single entry on all CPUs in the configuration. If the first and second operands are unequal, the second operand is loaded at the first-operand location. The comparison result is indicated by the condition code. A method, system and a computer program product are provided.

Abstract translation: 比较第一和第二操作数。 如果它们相等，则寄存器R1 + 1的内容存储在第二操作数位置，并且配置中指定的CPU或CPU将清除通过使用替换的条目形成的指定类型的所有TLB表项 存储和通过使用清除的更高级TLB表条目形成的所有较低级别的TLB表条目。 有效的DAT表条目被替换为新条目，并且翻译后备缓冲区（TLB）被清除组态中所有CPU上的（至少）单个条目的任何副本。 如果第一和第二操作数不相等，则第二个操作数被加载到第一个操作数位置。 比较结果由条件码表示。 提供了一种方法，系统和计算机程序产品。

公开(公告)号：WO2009087158A4

公开(公告)日：2009-11-12

申请号：PCT/EP2009050105

申请日：2009-01-07

Applicant: IBM ,  IBM UK ,  GREINER DAN ,  SLEGEL TIMOTHY

Inventor： GREINER DAN ,  SLEGEL TIMOTHY

IPC: G06F9/32

CPC classification number: G06F9/30058 ,  G06F9/30094 ,  G06F9/30167

Abstract: An atomic compare and branch instruction is executed that combines the function of a compare instruction having an option field with a conditional branch or jump instruction such that condition codes are preserved rather than setting condition codes to a value representative of the compare results. One comparand is obtained from any one of a memory location or an immediate field and the other comparand is obtained from a register field.

Abstract translation: 执行原子比较和分支指令，其将具有选项字段的比较指令的功能与条件分支或跳转指令相组合，以便保存条件码而不是将条件码设置为表示比较结果的值。 一个比较数是从存储位置或立即数字段中的任何一个获得的，而另一个比较数是从寄存器字段获得的。

公开(公告)号：WO2013186722A3

公开(公告)日：2014-03-27

申请号：PCT/IB2013054813

申请日：2013-06-12

Applicant: IBM ,  IBM UK

Inventor： GREINER DAN ,  JACOBI CHRISTIAN ,  SLEGEL TIMOTHY ,  ROGERS ROBERT

IPC: G06F9/46

CPC classification number: G06F9/3861 ,  G06F9/3001 ,  G06F9/3004 ,  G06F9/30047 ,  G06F9/30076 ,  G06F9/30087 ,  G06F9/30098 ,  G06F9/30145 ,  G06F9/30181 ,  G06F9/3834 ,  G06F9/466

Abstract: Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.

Abstract translation: 选择性地控制事务环境中的指令的执行。 一个TRANSACTION BEGIN指令启动事务，并且包括有选择地指示某些类型的指令是否允许在事务内执行的控件。 控制包括允许访问寄存器修改控制和允许浮点操作控制中的一个或多个。

公开(公告)号：WO2009087166A3

公开(公告)日：2009-09-17

申请号：PCT/EP2009050117

申请日：2009-01-07

Applicant: IBM ,  IBM UK ,  GREINER DAN ,  SLEGEL TIMOTHY

Inventor： GREINER DAN ,  SLEGEL TIMOTHY

IPC: G06F9/312

CPC classification number: G06F9/30043 ,  G06F9/30163 ,  G06F9/30167 ,  G06F9/324 ,  G06F9/3557

Abstract: A method, system and program product for loading or storing memory data wherein the address of the memory operand is based an offset of the program counter rather than an explicitly defined address location. The offset is defined by an immediate field of the instruction which is sign extended and is aligned as a halfword address when added to the value of the program counter.

Abstract translation: 一种用于加载或存储存储器数据的方法，系统和程序产品，其中存储器操作数的地址基于程序计数器的偏移而不是明确定义的地址位置。 偏移量由符号扩展的指令的立即字段定义，并在添加到程序计数器的值时作为半字地址对齐。

公开(公告)号：WO2009087158A3

公开(公告)日：2009-09-17

申请号：PCT/EP2009050105

申请日：2009-01-07

Applicant: IBM ,  IBM UK ,  GREINER DAN ,  SLEGEL TIMOTHY

Inventor： GREINER DAN ,  SLEGEL TIMOTHY

IPC: G06F9/32

CPC classification number: G06F9/30058 ,  G06F9/30094 ,  G06F9/30167

Abstract: An atomic compare and branch instruction is executed that combines the function of a compare instruction having an option field with a conditional branch or jump instruction such that condition codes are preserved rather than setting condition codes to a value representative of the compare results. One comparand is obtained from any one of a memory location or an immediate field and the other comparand is obtained from a register field.

Abstract translation: 执行原子比较和分支指令，其将具有选项字段的比较指令的功能与条件分支或跳转指令相结合，使得保留条件代码而不是将条件代码设置为代表比较结果的值。 从存储器位置或立即场中的任何一个获得一个比较，并且从寄存器字段获得另一个比较。

公开(公告)号：WO2013186606A8

公开(公告)日：2014-12-18

申请号：PCT/IB2012056736

申请日：2012-11-26

Applicant: IBM ,  IBM UK

Inventor： GREINER DAN ,  ROGERS ROBERT ,  SITTMANN GUSTAV

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F9/3004 ,  G06F9/3824 ,  G06F12/1009 ,  G06F2212/683

Abstract: A first and a second operand are compared. If they are equal, the contents of register R1 + 1 are stored at the second-operand location, and the specified CPU or CPUs in the configuration are cleared of all TLB table entries of the designated type formed through the use of the replaced entry in storage, and all lower-level TLB table entries formed through the use of the cleared higher-level TLB table entries. A valid DAT table entry is replaced with a new entry, and the Translation Lookaside Buffer (TLB) is purged of any copies of (at least) the single entry on all CPUs in the configuration. If the first and second operands are unequal, the second operand is loaded at the first-operand location. The comparison result is indicated by the condition code. A method, system and a computer program product are provided.

Abstract translation: 比较第一和第二操作数。 如果它们相等，则寄存器R1 + 1的内容存储在第二操作数位置，并且配置中指定的CPU或CPU将清除通过使用替换的条目形成的指定类型的所有TLB表项 存储和通过使用清除的更高级TLB表条目形成的所有较低级别的TLB表条目。 有效的DAT表条目被替换为新条目，并且翻译后备缓冲区（TLB）被清除组态中所有CPU上的（至少）单个条目的任何副本。 如果第一和第二操作数不相等，则第二个操作数被加载到第一个操作数位置。 比较结果由条件码表示。 提供了一种方法，系统和计算机程序产品。

公开(公告)号：WO2009087133A9

公开(公告)日：2009-09-24

申请号：PCT/EP2009050050

申请日：2009-01-05

Applicant: IBM ,  GREINER DAN ,  GAINEY CHARLES JR ,  HELLER LISA ,  OSISEK DAMIAN ,  PFEFFER ERWIN ,  SLEGEL TIMOTHY ,  WEBB CHARLES

Inventor： GREINER DAN ,  GAINEY CHARLES JR ,  HELLER LISA ,  OSISEK DAMIAN ,  PFEFFER ERWIN ,  SLEGEL TIMOTHY ,  WEBB CHARLES

IPC: G06F12/14 ,  G06F12/10

CPC classification number: G06F12/1027 ,  G06F9/30047 ,  G06F12/0215 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/145 ,  G06F2212/1052 ,  G06F2212/654 ,  G06F2212/656 ,  G06F2212/68

Abstract: What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated is first obtained and an initial origin address of a translation table of the hierarchy of translation tables is obtained. Based on the obtained initial origin, a segment table entry is obtained. The segment table entry is configured to contain a format control and access validity fields. If the format control and access validity fields are enabled, the segment table entry further contains an access control field, a fetch protection field, and a segment-frame absolute address. Store operations are permitted only if the access control field matches a program access key provided by any one of a Program Status Word or an operand of a program instruction being executed. Fetch operations are permitted if the program access key associated with the virtual address is equal to the segment access control field.

Abstract translation: 提供的是增强的动态地址转换设施。 在一个实施例中，首先获得要被翻译的虚拟地址，并且获得翻译表层级的翻译表的初始起始地址。 基于获得的初始起点，获得段表条目。 段表项被配置为包含格式控制和访问有效性字段。 如果启用格式控制和访问有效性字段，则段表条目还包含访问控制字段，提取保护字段和段帧绝对地址。 仅当访问控制字段与程序状态字或正在执行的程序指令的操作数提供的程序访问键匹配时，才允许存储操作。 如果与虚拟地址相关联的程序访问密钥等于段访问控制字段，则允许获取操作。