12.
    发明专利
    未知

    公开(公告)号:AT470187T

    公开(公告)日:2010-06-15

    申请号:AT04813127

    申请日:2004-12-06

    Applicant: IBM

    Abstract: An RNIC implementation that performs direct data placement to memory where all segments of a particular connection are aligned, or moves data through reassembly buffers where all segments of a particular connection are non-aligned. The type of connection that cuts-through without accessing the reassembly buffers is referred to as a "Fast" connection because it is highly likely to be aligned, while the other type is referred to as a "Slow" connection. When a consumer establishes a connection, it specifies a connection type. The connection type can change from Fast to Slow and back. The invention reduces memory bandwidth, latency, error recovery using TCP retransmit and provides for a "graceful recovery" from an empty receive queue. The implementation also may conduct CRC validation for a majority of inbound DDP segments in the Fast connection before sending a TCP acknowledgement (Ack) confirming segment reception.

    DATA TRANSFER ERROR CHECKING
    13.
    发明专利

    公开(公告)号:CA2548085C

    公开(公告)日:2014-04-29

    申请号:CA2548085

    申请日:2004-12-08

    Applicant: IBM

    Abstract: A network interface controller implementation that performs direct data placement to memory where all segments of a particular connection are aligned, i.e. cuts-through without accessing reassembly buffers (i.e., a "Fast" connection type), or if all segments are non~aligned moves data through reassembly buffers (i.e., a "Slow" connection type). The type of connection can change from Fast to Slow and back. The implementation preferably conducts CRC validation for a majority of inbound DDP segments in the Fast connection before sending a TCP acknowledgement confirming segment reception. The method of computing a CRC value according to the present invention assumes that each TCP segment starts with an aligned DDP segment and that the first two bytes of a TCP payload is an MPA length field of an MPA frame.

    DATA TRANSFER ERROR CHECKING
    14.
    发明专利

    公开(公告)号:CA2548085A1

    公开(公告)日:2005-07-07

    申请号:CA2548085

    申请日:2004-12-08

    Applicant: IBM

    Abstract: A network interface controller implementation that performs direct data placement to memory where all segments of a particular connection are aligne d, i.e. cuts-through without accessing reassembly buffers (i.e., a "Fast" connection type), or if all segments are non~aligned moves data through reassembly buffers (i.e., a "Slow" connection type). The type of connection can change from Fast to Slow and back. The implementation preferably conduct s CRC validation for a majority of inbound DDP segments in the Fast connection before sending a TCP acknowledgement confirming segment reception. The metho d of computing a CRC value according to the present invention assumes that eac h TCP segment starts with an aligned DDP segment and that the first two bytes of a TCP payload is an MPA length field of an MPA frame.

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