Abstract:
PROBLEM TO BE SOLVED: To provide a thread execution control method and system for executing a critical section in a complex core, in a heterogeneous multicore processor. SOLUTION: The thread execution control method that uses heterogeneous multicore processor loaded with a plurality of simple cores 30-n and at least one complex core includes: a step in which, when one thread obtains locking of a critical section among the threads currently being executed by the plurality of simple cores 30-n, or at least one complex core 50; the other threads 60 encountering a locking conflict are transferred to the complex core 50 according to the encounter of the other threads 60 with the locking conflict; and a step in which the complex core 50 performs critical section execution of the other threads 60, after the other threads 60 transferred to the complex core 50, obtain locking. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a conversion apparatus converting a program configured such that the program is efficiently operated when each thread accesses a common variable used in common by a plurality of threads, in a computer system using multithread. SOLUTION: The conversion apparatus for converting the program has: an update replacement part 32 for replacing update processing of the common variable included in each of two or more programs with update processing of a specific variable allocated to each of the two or more programs; and a reference replacement part 34 for replacing reference processing of the common variable included in at least one program with calculation processing of calculating a value of the common variable from a value of the specific variable allocated to each of the two or more programs and returning it. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a mechanism for stopping only a thread in which a fault is caused or a fault may be caused from another thread without stopping the whole system having a locked thread. SOLUTION: A computer system stores a program including a code for a critical section, wherein the critical section includes an instruction for writing or reading a value to/from a shared data area in a memory. The instruction acquires lock for the critical section before the start of an initial instruction in the critical section, writes a value in a thread local area in the memory instead of writing the value in the shared data area in response to a writing instruction to the shared data area, writes the value written in the thread local area in the shared data area in response to the end of a final instruction in the critical section, and unlocks the critical section. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To reduce variables not to be allocated to registers, reduce transfer of value between registers, and improve efficiency in executing a program. SOLUTION: A compiler device stores interference information indicating an interference relation between variables, selects a register according to a predetermined procedure from a reference number or more of the registers so that the same register is not allocated to the set of variables having the interference relation, allocates the register to each of the respective variables, substitutes the plurality of variables allocated to the same register with new variables, merges the interference relations for each of the plurality of variables, generates an interference relation for the new variables, updates the interference information according to the interference relation, and allocates a register selected from the reference number or more of registers according to a procedure same as the predetermined procedure to each of the variables in the program that uses the new variables so that the same register is not allocated to a set of certain variables having an interference relation based on the updated interference information. COPYRIGHT: (C)2009,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To appropriately detect an error part of a program. SOLUTION: An information processing system for analyzing a generation program for generating document information comprising a plurality of document components, which generation program has a plurality of generation commands for generating the plurality of document components included in the document information respectively, comprises: a correspondence information generation part for executing the generation program and generating correspondence information indicating correspondence between the plurality of generation commands and the document components generated by the executed generation commands; a selection part for selecting any of the plurality of document components at a user's instruction; and a command information output part for selecting, according to the correspondence information, the generation command that has generated the document component selected by the selection part and outputting information identifying the generation command. COPYRIGHT: (C)2005,JPO&NCIPI