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公开(公告)号：DE19960047B4
公开(公告)日：2006-01-26
申请号：DE19960047
申请日：1999-12-14
Applicant: IBM
Inventor： CHARI SURESH NARAYANA , COPPERSMITH DON , SCHERZER HELMUT , ROHATQI PANKAJ , WEINGART STEVE HARRIS , WITZEL MARTIN
IPC: G06K19/073 , G07F7/10 , H04L9/06 , H04L9/28 , H04L12/22
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公开(公告)号：DE60019364D1
公开(公告)日：2005-05-19
申请号：DE60019364
申请日：2000-02-29
Applicant: IBM
Inventor： SCHERZER HELMUT
Abstract: The basic idea comprised of the present invention is to provide two sets of descriptors having each at least three descriptors and each set is used in an alternating manner for defining the location of source and target of the copy operations which are to be performed during the defragmentation procedure. The defragmentation procedure is performed as a sequence of copy operations on copy chunks, i.e., a certain number of sequentially arranged bytes to be copied being part of a valid data block to be copied. In each of said copy operations in said sequence the values which are assigned to said descriptors Change. According to a characterizing feature of the present invention during the whole sequence of copy operations comprised of the defragmentation process one of the two sets of descriptors holds information which is usable for restoring the contents of a copy chunk in case of a power break during a copy operation on said copy chunk. Thus, defragmenting is a safe procedure, and data integrity is assured.
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公开(公告)号：DE10020093A1
公开(公告)日：2001-03-22
申请号：DE10020093
申请日：2000-04-22
Applicant: IBM
Inventor： JANSON PHILIPPE , SCHERZER HELMUT
Abstract: A computerized transaction, such as bank or reservation transaction, is initiated to modify available data set on a smart-card. The transaction is then processed, and monitored whether it is successfully concluded on the smart-card. An error resistant scheme error recovery, particularly an error resistant data set index swap scheme, is provided on the smart-card. The method implements a data integrity scheme for a transaction using an error correction scheme. Independent claims are also included for the following: (a) a smart-card for application in transaction system; (b) a transaction processing system; (c) and a computer readable recording medium used in storing program for management of transaction data.
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公开(公告)号：DE19831884A1
公开(公告)日：2000-01-20
申请号：DE19831884
申请日：1998-07-17
Applicant: IBM
Inventor： SCHAAL ALBERT , SCHERZER HELMUT , SCHILLING MICHAEL
Abstract: The invention presented describes a system and procedure for protecting against the espionage of secret information. A counter is allocated to each secret piece of information, in particular codes. The counter counts the number of uses of the secret information. In this, the counter is set to a starting value. Each use of the secret data element increases the counter state by a defined value. If the counter state reaches a maximum value, the use of the secret data element will be blocked. The blocking of the secret information can, however, be avoided if a defined event occurs before the maximum value of the counter is reached which automatically resets the counter state to its starting value. Any technical, economic or organisational condition can be defined as an event. Particular advantages of the invention presented are that each code can have its own counter allocated to it. In this way, different numbers of uses can be established for each code with regard to its function. As a chip card can contain any number of codes for the most widely differing applications, the block is limited solely to the application affected. The use of the chip card is not therefore blocked as a whole. The events can be easily adapted to the widest range of security and user requirements of the respective application area.
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Patent Agency Ranking
公开(公告)号：AT534962T
公开(公告)日：2011-12-15
申请号：AT02767298
申请日：2002-08-01
Applicant: IBM
Inventor： CHARI SURESH , RAO JOSYULA , ROHATGI PANKAJ , SCHERZER HELMUT
IPC: G06F21/00
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公开(公告)号：AT293264T
公开(公告)日：2005-04-15
申请号：AT00104109
申请日：2000-02-29
Applicant: IBM
Inventor： SCHERZER HELMUT
Abstract: The basic idea comprised of the present invention is to provide two sets of descriptors having each at least three descriptors and each set is used in an alternating manner for defining the location of source and target of the copy operations which are to be performed during the defragmentation procedure. The defragmentation procedure is performed as a sequence of copy operations on copy chunks, i.e., a certain number of sequentially arranged bytes to be copied being part of a valid data block to be copied. In each of said copy operations in said sequence the values which are assigned to said descriptors Change. According to a characterizing feature of the present invention during the whole sequence of copy operations comprised of the defragmentation process one of the two sets of descriptors holds information which is usable for restoring the contents of a copy chunk in case of a power break during a copy operation on said copy chunk. Thus, defragmenting is a safe procedure, and data integrity is assured.
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公开(公告)号：DE69909379D1
公开(公告)日：2003-08-14
申请号：DE69909379
申请日：1999-05-05
Applicant: IBM
Inventor： SCHAAL ALBERT , SCHERZER HELMUT , SCHILLING MICHAEL
Abstract: The invention presented describes a system and procedure for protecting against the espionage of secret information. A counter is allocated to each secret piece of information, in particular codes. The counter counts the number of uses of the secret information. In this, the counter is set to a starting value. Each use of the secret data element increases the counter state by a defined value. If the counter state reaches a maximum value, the use of the secret data element will be blocked. The blocking of the secret information can, however, be avoided if a defined event occurs before the maximum value of the counter is reached which automatically resets the counter state to its starting value. Any technical, economic or organisational condition can be defined as an event. Particular advantages of the invention presented are that each code can have its own counter allocated to it. In this way, different numbers of uses can be established for each code with regard to its function. As a chip card can contain any number of codes for the most widely differing applications, the block is limited solely to the application affected. The use of the chip card is not therefore blocked as a whole. The events can be easily adapted to the widest range of security and user requirements of the respective application area.
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公开(公告)号：SG42858A1
公开(公告)日：1997-10-17
申请号：SG1996000206
申请日：1992-04-15
Applicant: IBM
Inventor： SCHERZER HELMUT
Abstract: A method for decoding F2F signals as well as a device for decoding F2F signals read from a magnetic data carrier is provided. The signal read from the card by a magnetic reading head 91 is amplified by an amplifier 912 with a very high gain, discriminated in a discrimination and integration station 913 to receive a binary locking signal. Out of this digitized signal in a reference time acquisition station 917 a start-up time value is set and a phase is estimated to determine the correct end of a bit cell in a phase estimating station 918. In a symbol correlation station 920 the received binary signal is correlated with all possible symbol combinations based on the estimated phase to create a correct bit stream. This bit stream might be processed further by a bit recovery station 922 providing a corrected bit stream ready for interpretation.
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公开(公告)号：CA2087769C
公开(公告)日：1996-10-29
申请号：CA2087769
申请日：1993-01-21
Applicant: IBM
Inventor： SCHERZER HELMUT
Abstract: A method for decoding F2F signals as well as a device for decoding F2F signals read from a magnetic data carrier is provided. The signal read from the card by a magnetic reading head 91 is amplified by an amplifier 912 with a very high gain, discriminated in a discrimination and integration station 913 to receive a binary looking signal. Out of this digitized signal in a reference time acquisition station 917 a start-up time value is set and a phase is estimated to determine the correct end of a bit cell in a phase estimating station 918. In a symbol correlation station 920 the received binary signal is correlated with all possible symbol combinations based on the estimated phase to create a correct bit stream. This bit stream might be processed further by a bit recovery station 922 providing a corrected bit stream ready for interpretation.
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