公开(公告)号：US3385725A

公开(公告)日：1968-05-28

申请号：US35384964

申请日：1964-03-23

Applicant: IBM

Inventor： SCHMECKENBECHER ARNOLD F

IPC: C22C19/00 ,  C23C18/50 ,  H01F41/24

CPC classification number: C22C19/00 ,  C23C18/50 ,  H01F41/24

公开(公告)号：US3305327A

公开(公告)日：1967-02-21

申请号：US42816265

申请日：1965-01-26

Applicant: IBM

Inventor： SCHMECKENBECHER ARNOLD F

IPC: C23C18/50 ,  H01F41/24

CPC classification number: H01F41/24 ,  C23C18/50 ,  Y10S428/926 ,  Y10S428/936 ,  Y10T29/49069 ,  Y10T428/12646

公开(公告)号：CA783529A

公开(公告)日：1968-04-23

申请号：CA783529D

Applicant: IBM

Inventor： SCHMECKENBECHER ARNOLD F

公开(公告)号：CA778335A

公开(公告)日：1968-02-13

申请号：CA778335D

Applicant: IBM

Inventor： SCHMECKENBECHER ARNOLD F

公开(公告)号：DE3380413D1

公开(公告)日：1989-09-21

申请号：DE3380413

申请日：1983-04-20

Applicant: RICHARDSON CHEMICAL CO ,  IBM

Inventor： BAUDRAND DONALD W ,  POWERS-FLEMING REBECCA ,  GNIEWEK JOHN J ,  HARVILCHUCK JOSEPH M ,  SCHMECKENBECHER ARNOLD F

IPC: H05K3/46 ,  C23C18/16 ,  C23C18/34 ,  H01L21/48 ,  H01L23/12 ,  H05K3/24

Abstract: A process for simultaneously selectively depositing a high purity nickel containing alloy (i.e. a nickel-boron alloy having a nickel content in excess of 99.5 percent) over a preformed metallurgy pattern (including the individual, electrically isolated contact pads and the seal band area thereon) on the top-side dielectric surface of a multi-layer ceramic module. The metallurgy pattern on such top-side surface of such module is appropriately catalyzed and then immersed in a bath which is essentially lead-free and which includes a source of nickel ions, a borane reducing agent, and an effective amount of an organic divalent sulfur compound, preferably thiodiglycollic acid. The contact pads and the seal band area so plated exhibit an exceptionally uniform layer of nickel-boron alloy, free of surface irregularities, which layer is characterized by low contact resistance, excellent wire bonding and eutectic diode bonding characteristics and is both crack-free at the time of its being deposited and remains crack-free under brazing conditions throughout the life of the component.

公开(公告)号：CA1207464A

公开(公告)日：1986-07-08

申请号：CA426397

申请日：1983-04-21

Applicant: RICHARDSON CHEMICAL CO ,  IBM

Inventor： BAUDRAND DONALD W ,  FLEMING REBECCA P ,  GNIEWEK JOHN J ,  HARVILCHUCK JOSEPH M ,  SCHMECKENBECHER ARNOLD F

IPC: H05K3/46 ,  C23C18/16 ,  C23C18/34 ,  H01L21/48 ,  H01L23/12 ,  H05K3/24 ,  H05K1/02 ,  H05K3/22

Abstract: Process for Selectively Depositing a NickelBoron Coating Over a Metallurgy Pattern on a Dielectric Substrate and Products Produced Thereby A process for simultaneously selectively depositing a high purity nickel containing alloy (i.e. a nickel-boron alloy having a nickel content in excess of 93.5 percent) over a preformed metallurgy pattern (including the individual, electrically isolated contact pads and the seal band area thereon) on the topside dielectric surface of a multi-layer ceramic module. The metallurgy pattern on such top-side surface of such module is appropriately catalyzed and then immersed in a bath which is essentially lead-free and which includes a source of nickel ions, a borane reducing agent, and an effective amount of an organic divalent sulfur compound, preferably thiodiglycollic acid. The contact pads and the seal band area so plated exhibit an exceptionally uniform layer of nickel-boron alloy, free of surface irregularities, which layer is characterized by low contact resistance, excellent wire bonding and eutectic diode bonding characteristics and is both crack-free at the time of its being deposited and remains crack-free under brazing conditions throughout the life of the component.

公开(公告)号：CA1132857A

公开(公告)日：1982-10-05

申请号：CA341840

申请日：1979-12-13

Applicant: IBM

Inventor： SCHMECKENBECHER ARNOLD F

IPC: H05K3/02 ,  C04B41/51 ,  C04B41/88 ,  C23C14/04 ,  G03F7/00 ,  H01L21/48 ,  H01L23/12 ,  H05K1/03 ,  H05K1/09 ,  H05K3/24 ,  B32B3/08 ,  H05K3/22

Abstract: METHOD OF SELECTIVELY DEPOSITING METAL ON A CERAMIC SUBSTRATE WITH A METALLURGY PATTERN A liftoff process for selectively depositing additional metal layers on an existing metallurgy pattern supported on a dielectric substrate which includes the steps of (1) depositing a hardenable material on the dielectric substrate which has the characteristic of wetting the substrate surface, but not the existing metallurgy pattern, (2) heating the hardenable material to convert it to a liquid wherein the material is distributed to cover the dielectric substrate surface, but not the metallurgy pattern,(3) cooling the hardenable material to solidify it,(4) depositing a blanket layer of metal on the surface of the substrate, (5), dissolving the hardenable material in a suitable solvent thereby removing the material and the overlying metal layer portions.

公开(公告)号：CA779508A

公开(公告)日：1968-02-27

申请号：CA779508D

Applicant: IBM

Inventor： LEILICH HANS-OTTO G ,  SCHMECKENBECHER ARNOLD F

公开(公告)号：CA1043188A

公开(公告)日：1978-11-28

申请号：CA213802

申请日：1974-11-15

Applicant: IBM

Inventor： SCHMECKENBECHER ARNOLD F

IPC: C04B37/02 ,  B28B11/04 ,  B32B15/04 ,  C04B41/88 ,  H05K1/09 ,  H05K3/00 ,  H05K3/10 ,  H05K3/12 ,  B41M3/08 ,  C04B39/00

Abstract: METHOD FOR METALLIZING CERAMIC GREEN SHEETS A process for metallizing a ceramic green sheet having via holes or recessed grooves formed therein by depositing a mask forming material over the green sheet, the mask forming material being non-wettable by a composition, either conductive or nonconductive, to be subsequently deposited in the via holes or recessed grooves. After the depositing step, a metal paste is spread or wiped into the vias and grooves and then the sheets are laminated and fired to form a multi-layer ceramic interconnection package whereby the mask forming material is volatized and eliminated from the structure without the necessity of removing the mask forming material in the conventional etching or peeling away methods.

公开(公告)号：FR2373499A1

公开(公告)日：1978-07-07

申请号：FR7733122

申请日：1977-10-27

Applicant: IBM

Inventor： MCINTOSH CHARLES M ,  SCHMECKENBECHER ARNOLD F

IPC: H01G4/12 ,  C04B33/13 ,  C04B35/634 ,  C04B37/00 ,  C04B38/00 ,  C04B41/00 ,  H01L23/08 ,  H01L23/12 ,  H05K1/03 ,  H05K1/09 ,  H05K3/00 ,  H05K3/10 ,  H05K3/12 ,  H05K3/46 ,  C04B35/64 ,  C04B39/00 ,  B32B31/26 ,  B32B33/00 ,  H05K3/36

Abstract: A method of making a multi-layer ceramic substrate for an integrated circuit device package having internal circuitry by forming a plurality of porous ceramic bisque sheets, impregnating the pores of the bisque sheets with an organic binder material, forming openings through the impregnated bisque sheets, filling the openings with conductive material and imprinting conductive circuitry patterns on the surface of the impregnated bisque sheets of a conductive material, assembling the plurality of apertured printed impregnated bisque sheets into a laminated unit, and sintering the laminated unit to form a unitary laminated structure having an interconnected internal circuitry system.