METHOD AND DEVICE FOR MULTIPLEXING A DATA SIGNAL AND SEVERAL SECONDARY SIGNALS, DEMULTIPLEXING METHOD AND DEVICE ASSOCIATED THEREWITH, AND INTERFACE TRANSMITTER RECEIVER USING THE SAME

    公开(公告)号:CA1165475A

    公开(公告)日:1984-04-10

    申请号:CA369980

    申请日:1981-02-03

    Applicant: IBM

    Inventor: VACHEE PIERRE

    Abstract: A time-division multiplexing method and device for combining a data signal and several secondary binary signals into a train of pulses, whereby data signals can be transmitted at various bit rates in synchronous of asynchronous mode. In the multiplexing method of the present invention, the data signal and N secondary signals are multiplexed together using two different frames respectively termed "synchronous frame" and "asynchronous frame", depending on whether data transmission is to be performed in synchronous or asynchronous mode. The asynchronous frame comprises a frame-alignment bit having a predetermined value, a data bit, and N bits pertaining respectively to the N secondary signals. The synchronous frame is divided up into n subframes, ?1 bits in length each, where n is equal to the integer that is immediately larger than the quantity N/(?1-2). Length ?1 is defined by the relation ?1 + LR/DR, where LR is the fixed bit rate for the pulse train resulting from the multiplexing process and DR is the bit rate for the data signal. Each subframe includes a synchronization bit whose value is complementary to that of the frame alignment bit, a data bit, and several bits pertaining respectively to the secondary signals. In addition, the last subframe includes a frame-alignment bit Each bit with a synchronous or asynchronous frame is associated with a control bit which has a first predetermined value when it is associated with a synchronization bit or a frame-alignment bit, and the complementary value when it is associated with a data bit or with a bit pertaining to the secondary signals. All of the frame bits together with the associated control bits are then encoded to be simultaneously transmitted over the transmission path. The frame bits define a data channel designated A, and the FR9-79-014 control bits define another channel designated B. The bits are paired off, with each pair comprising a channel A bit and the channel B bit associated therewith, and each of these pairs is encoded for transmission over the line. The invention also provides the demultiplexing method associated with the multiplexing method described above. The invention further provides an interface transmitter and an interface receiver embodying the methods described above and allowing various DTE to exchange data, control and timing signals. FR9-79-014

    DATA TRANSMISSION PROCESS AND DEVICE APPLYING SAID PROCESS

    公开(公告)号:CA1141492A

    公开(公告)日:1983-02-15

    申请号:CA335354

    申请日:1979-09-10

    Applicant: IBM

    Abstract: A process for transmitting binary sequences of data using a ternary coded signal. Several trains of binary signals are time multiplexed by a group of registers to generate a first binary sequence which is applied to an encoding unit. The encoding unit also receives a second binary sequence and clocking information. When the time-multiplexed sequence of binary signals is at one binary level the encoding unit codes the combined signal in a bipolar mode. When the time-multiplexed sequence of binary signals is at a second binary level, the resulting signal is coded in the biphase mode. FR9-78-001

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