公开(公告)号：US09104595B2

公开(公告)日：2015-08-11

申请号：US13797681

申请日：2013-03-12

Applicant: Intel Corporation

Inventor： Suneeta Sah

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/42

CPC classification number: G06F11/1048 ,  G06F11/1004 ,  G11C29/42

Abstract: Embodiments of apparatus, methods, systems, computer-readable storage media and devices are described herein for determining an error category for a detected error in data read from a volatile memory; and selectively performing or causing an additional remedial action based at least in part on the error category determined. In various embodiments, the determining and the performing or causing may be undertaken in response to the correcting. The memory may be volatile or non-volatile memory. Other embodiments may be described and/or claimed.

Abstract translation: 本文描述了装置，方法，系统，计算机可读存储介质和设备的实施例，用于确定从易失性存储器读取的数据中检测到的错误的错误类别; 以及至少部分地基于所确定的错误类别选择性地执行或引起额外的补救措施。 在各种实施例中，可以响应于校正而进行确定和执行或导致。 存储器可能是易失性或非易失性存储器。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20150089111A1

公开(公告)日：2015-03-26

申请号：US14560976

申请日：2014-12-04

Applicant: Intel Corporation

Inventor： Kuljit S. Bains ,  Klaus J. Ruff ,  George Vergis ,  Suneeta Sah

IPC: G06F13/28 ,  G06F13/16

CPC classification number: G11C7/1072 ,  G06F11/073 ,  G06F11/0787 ,  G06F11/10 ,  G06F11/1004 ,  G06F11/1016 ,  G06F11/1612 ,  G06F13/16 ,  G06F13/28 ,  G11C7/1006 ,  G11C29/44 ,  G11C2029/0411 ,  G11C2029/4402

Abstract: A register not connected to a data bus is read by transferring data across an address bus to a device connected to the data bus, from which the data is read by a device connected to the data bus. The register resides in a register device connected via the address bus to a memory device that is connected to both the address bus and the data bus. A host processor triggers the register device to transfer information over the address bus to a register on the memory device. The host processor then reads the information from the register of the memory device.

Abstract translation: 通过将地址总线上的数据传送到连接到数据总线的设备，可以读取未连接到数据总线的寄存器，数据由连接到数据总线的设备读取。 寄存器位于通过地址总线连接到连接到地址总线和数据总线两者的存储器件的寄存器中。 主处理器触发寄存器设备通过地址总线将信息传送到存储器设备上的寄存器。 然后主机处理器从存储器件的寄存器读取信息。