公开(公告)号：US20190043415A1

公开(公告)日：2019-02-07

申请号：US16024587

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Vishal Sinha ,  Paul Diefenbaugh ,  Todd Witter ,  Jason Tanner ,  Arthur Runyan ,  Nausheen Ansari ,  Kathy Bui ,  Yifan Li

IPC: G09G3/22 ,  G06F1/32

Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.

公开(公告)号：US20240355306A1

公开(公告)日：2024-10-24

申请号：US18753839

申请日：2024-06-25

Applicant: Intel Corporation

Inventor： Krishna Nidamanuri ,  Arvind Tomar ,  Bharatkumar Mahajan ,  Perazhi Sameer Kalathil ,  Nausheen Ansari ,  Arthur Runyan

IPC: G09G5/00 ,  G06F1/10 ,  G06F3/14

CPC classification number: G09G5/006 ,  G06F1/10 ,  G06F3/14 ,  G09G2320/0257 ,  G09G2330/023 ,  G09G2340/0435

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to reduce dynamic refresh rate power consumption. An example apparatus includes interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to modify a value of a source clock based on a detected application type, generate a pixel clock value change request based on the application type, cause transmission of the pixel clock value change request to a display, and cause transmission of pixels to the display at the modified source clock value.

公开(公告)号：US20210203811A1

公开(公告)日：2021-07-01

申请号：US17201964

申请日：2021-03-15

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Paul Diefenbaugh ,  Vishal Sinha ,  Arthur Runyan ,  Gary K. Smith ,  Kathy Bui ,  Yifan Li ,  Shirley Huang Meterelliyoz

IPC: H04N5/073 ,  G06T1/60 ,  G09G5/00 ,  G09G5/399 ,  G09G5/36 ,  G06F3/14 ,  G09G5/393

Abstract: Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can obtain an indication of a new frame and, in response to the indication of the new frame not including an indication of a flip completion event: (i) fill the display buffer with the new frame; (ii) scan out the new frame from the display buffer to a display port; and (iii) apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame.

公开(公告)号：US20210090485A1

公开(公告)日：2021-03-25

申请号：US16866520

申请日：2020-05-04

Applicant: Intel Corporation

Inventor： Vishal Sinha ,  Paul Diefenbaugh ,  Todd Witter ,  Jason Tanner ,  Arthur Runyan ,  Nausheen Ansari ,  Kathy Bui ,  Yifan Li

IPC: G09G3/22 ,  G06F1/3237 ,  G06F1/3234 ,  G06F1/3206 ,  G09G3/20 ,  G06F3/041

Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.

公开(公告)号：US10516812B2

公开(公告)日：2019-12-24

申请号：US15943617

申请日：2018-04-02

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Paul Diefenbaugh ,  Vishal Sinha ,  Arthur Runyan ,  Gary K. Smith ,  Kathy Bui ,  Yifan Li ,  Shirley Huang Meterelliyoz

IPC: G09G5/399 ,  G06T1/60 ,  G09G5/00 ,  H04N5/073 ,  G06F3/14 ,  G09G5/36 ,  G09G5/393

Abstract: Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can determine if a new frame includes one or more dirty portions. If the new frame includes one or more dirty portions, just the dirty portions can be loaded by the display engine into a display buffer. The display engine can also scan out just the dirty portions from the display buffer to a display.

公开(公告)号：US20190138076A1

公开(公告)日：2019-05-09

申请号：US16235600

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Paul Diefenbaugh ,  Arthur Runyan ,  Gary Smith ,  Kathy Bui ,  Ajay Saini ,  Vishal Sinha ,  Yifan Li ,  Yong-Joon Park

IPC: G06F1/3218 ,  G06F1/3296 ,  G06F1/3287

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed for reduced computing device power consumption. Example methods disclosed herein includes detecting frame updates corresponding to input frames to be presented by a display, causing a programmable timer to generate second interrupts corresponding to first interrupts generated by a display engine, the second interrupts to be generated when there are no frame updates detected for at least a first duration of time defined by a first threshold. Example methods further include causing the display engine to transition to a low power state when (1) the programmable timer is configured to generate the second interrupts and (2) no frame updates have been detected for at least a second duration of time following the first duration of time, the second duration of time defined by a second threshold.