公开(公告)号：US09411398B2

公开(公告)日：2016-08-09

申请号：US13630846

申请日：2012-09-28

Applicant: INTEL CORPORATION

Inventor： Gang Ji ,  Alexander B. Uan-Zo-Li ,  Jorge P. Rodriguez ,  Andy Keates ,  Vasudevan Srinivasan

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/3212 ,  G06F1/324 ,  Y02D10/126 ,  Y02D10/174

Abstract: An electronic apparatus is provided that includes a processor, a voltage regulator, a battery controller and an embedded controller. The voltage regulator to receive an input voltage and to provide an output voltage to the processor. The battery controller to store electronic device information and to receive battery information related to a current battery power. The embedded controller to receive the electronic device information and the battery information from the battery controller, and the embedded controller to provide power information to the processor based on the received information.

Abstract translation: 提供一种电子设备，其包括处理器，电压调节器，电池控制器和嵌入式控制器。 电压调节器接收输入电压并向处理器提供输出电压。 电池控制器，用于存储电子设备信息并接收与当前电池电力相关的电池信息。 嵌入式控制器从电池控制器接收电子设备信息和电池信息，以及嵌入式控制器，基于接收到的信息向处理器提供电源信息。

公开(公告)号：US09395774B2

公开(公告)日：2016-07-19

申请号：US13730291

申请日：2012-12-28

Applicant: Intel Corporation

Inventor： Efraim Rotem ,  James G. Hermerding, II ,  Ruoying Ma ,  Jorge P. Rodriguez ,  Nir Rosenzweig

IPC: G06F1/26 ,  G06F1/20 ,  G06F1/32

CPC classification number: G06F1/26 ,  G06F1/206 ,  G06F1/324 ,  G06F1/325 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/16 ,  Y02D10/172

Abstract: Methods and apparatus relating to total platform power control are described. In one embodiment, power consumption by one or more processor cores of a processor and one or more components coupled to the processor are modified based on a total platform power consumption value. The platform, in turn, includes the processor and the one or more components. Other embodiments are also disclosed and claimed.

Abstract translation: 描述了与平台总功率控制有关的方法和设备。 在一个实施例中，基于总平台功耗值修改处理器的一个或多个处理器核心和耦合到处理器的一个或多个组件的功率消耗。 该平台又包括处理器和一个或多个组件。 还公开并要求保护其他实施例。

公开(公告)号：US12093196B2

公开(公告)日：2024-09-17

申请号：US17711380

申请日：2022-04-01

Applicant: Intel Corporation

Inventor： Rob W. Sims ,  Aurelio Rodriguez Echevarria ,  Jorge P. Rodriguez ,  Phil R. Lehwalder ,  Sivasankarareddy Juturu ,  Stephen P. Eastman

IPC: G06F13/20 ,  G06F1/26 ,  G06F1/28

CPC classification number: G06F13/20 ,  G06F2213/40

Abstract: A power supply comprising a hardware interface having conductive contacts and conforming to a power supply design standard comprising a pin-out definition specifying that a first conductive contact is to be dedicated to communicating first information of a first type. The power supply comprises first, second, and third circuitry. The first circuitry is to determine the first information. The second circuitry is to determine second information of a second type, wherein the second type of information is other than the first type. The third circuitry is to send, via the first conductive contact, a communication comprising the first information and the second information. In embodiments, a PCB comprises a connector to couple the PCB to the power supply via an interconnect to be coupled to the hardware interface, and an IC to receive the communication, and identify the first and second information.

公开(公告)号：US11054877B2

公开(公告)日：2021-07-06

申请号：US16012623

申请日：2018-06-19

Applicant: Intel Corporation

Inventor： Dorit Shapira ,  Anand K. Enamandram ,  Daniel Cartagena ,  Krishnakanth Sistla ,  Jorge P. Rodriguez ,  Efraim Rotem ,  Nir Rosenzweig

IPC: G06F1/26 ,  G06F1/32 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/3296 ,  G06F1/324 ,  G06F1/3234 ,  H03M1/12

Abstract: An apparatus is provided, where the apparatus includes a plurality of components; a first sensing system to measure first power consumed by first one or more components of the plurality of components; a second sensing system to measure second power consumed by the apparatus; an analog-to-digital converter (ADC) to generate an identification (ID) that is representative of the second power consumed by the apparatus; and a controller to allocate power budget to one or more components of the plurality of components, based on the measurement of the first power and the ID.

公开(公告)号：US10234920B2

公开(公告)日：2019-03-19

申请号：US15252543

申请日：2016-08-31

Applicant: Intel Corporation

Inventor： Avinash N. Ananthakrishnan ,  Jorge P. Rodriguez

IPC: G06F1/32 ,  G06F1/26 ,  G06F1/324 ,  G06F1/3296

Abstract: In one embodiment, a processor includes: at least one core to execute instructions; a power controller to control power consumption of the processor; and a storage to store a plurality of entries to associate a dynamic capacitance with a time duration for which a current spike is to be exposed to a power delivery component. Other embodiments are described and claimed.

公开(公告)号：US10222851B2

公开(公告)日：2019-03-05

申请号：US15331051

申请日：2016-10-21

Applicant: Intel Corporation

Inventor： Efraim Rotem ,  Nir Rosenzweig ,  Doron Rajwan ,  Nadav Shulman ,  Gal Leibovich ,  Tomer Ziv ,  Amit Gabai ,  Jorge P. Rodriguez ,  Jeffrey A. Carlson

IPC: G06F1/32 ,  G06F1/324 ,  G05F1/10 ,  H03L7/08 ,  G06F1/28 ,  G06F1/3206

Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.