公开(公告)号：US20190044886A1

公开(公告)日：2019-02-07

申请号：US15941943

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Anil Rao ,  Suraj Prabhakaran ,  Mohan Kumar ,  Karthik Kumar

IPC: H04L12/947 ,  H04L12/931 ,  H04L12/801 ,  H04L12/66

Abstract: Technologies for accelerating edge device workloads at a device edge network include a network computing device which includes a processor platform that includes at least one processor which supports a plurality of non-accelerated function-as-a-service (FaaS) operations and an accelerated platform that includes at least one accelerator which supports a plurality of accelerated FaaS (AFaaS) operation. The network computing device is configured to receive a request to perform a FaaS operation, determine whether the received request indicates that an AFaaS operation is to be performed on the received request, and identify compute requirements for the AFaaS operation to be performed. The network computing device is further configured to select an accelerator platform to perform the identified AFaaS operation and forward the received request to the selected accelerator platform to perform the identified AFaaS operation. Other embodiments are described and claimed.

公开(公告)号：US10078522B2

公开(公告)日：2018-09-18

申请号：US13977635

申请日：2012-11-21

Applicant: Intel Corporation

Inventor： Mohan Kumar ,  Sarathy Jayakumar ,  Neelam Chandwani

IPC: G06F1/20 ,  G06F1/26 ,  G06F1/28 ,  G06F1/32 ,  G06F11/30 ,  G06F11/34 ,  G06F11/36 ,  G06F15/78 ,  G06F17/30 ,  G06F9/22 ,  G06F9/30 ,  G06F9/38 ,  G06F9/44 ,  G06F9/445 ,  G06F9/4401

CPC classification number: G06F9/4403 ,  G06F1/206 ,  G06F1/26 ,  G06F1/28 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3275 ,  G06F1/3296 ,  G06F9/22 ,  G06F9/30098 ,  G06F9/3012 ,  G06F9/384 ,  G06F9/44 ,  G06F9/4401 ,  G06F9/4418 ,  G06F9/445 ,  G06F11/3024 ,  G06F11/3409 ,  G06F11/3447 ,  G06F11/3466 ,  G06F11/3664 ,  G06F11/3672 ,  G06F11/3688 ,  G06F15/7871 ,  G06F16/2282 ,  G06F2209/501 ,  G06F2217/78 ,  Y02D10/126 ,  Y02D10/172

Abstract: In some embodiments, a PPM interface may be provided with functionality to facilitate to an OS memory power state management for one or more memory nodes, regardless of a particular platform hardware configuration, as long as the platform hardware is in conformance with the PPM interface.

公开(公告)号：US09594570B2

公开(公告)日：2017-03-14

申请号：US13977625

申请日：2012-11-21

Applicant: Intel Corporation

Inventor： Mohan Kumar ,  Sarathy Jayakumar ,  Jose Andy Vargas

IPC: G06F11/00 ,  G06F9/44 ,  G06F17/30 ,  G06F9/445 ,  G06F1/28 ,  G06F11/36 ,  G06F1/26 ,  G06F9/22 ,  G06F11/34 ,  G06F9/30 ,  G06F1/20 ,  G06F15/78 ,  G06F1/32 ,  G06F9/38

CPC classification number: G06F9/4403 ,  G06F1/206 ,  G06F1/26 ,  G06F1/28 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/324 ,  G06F1/3275 ,  G06F1/3296 ,  G06F9/22 ,  G06F9/30098 ,  G06F9/3012 ,  G06F9/384 ,  G06F9/44 ,  G06F9/4401 ,  G06F9/4418 ,  G06F9/445 ,  G06F11/3024 ,  G06F11/3409 ,  G06F11/3447 ,  G06F11/3466 ,  G06F11/3664 ,  G06F11/3672 ,  G06F11/3688 ,  G06F15/7871 ,  G06F17/30339 ,  G06F2209/501 ,  G06F2217/78 ,  Y02D10/126 ,  Y02D10/172

Abstract: Described is a computing platform, which comprises: a non-volatile memory having a firmware boot program; and a CPU to execute the firmware boot program when the CPU is reset, the firmware boot program including instructions to create Power and Performance Measurement (PPM) interface data structures including an error injection table structure to provide error injection services to an OS.

Abstract translation: 描述了一种计算平台，其包括：具有固件引导程序的非易失性存储器; 以及CPU，当CPU被复位时执行固件引导程序，该固件引导程序包括用于创建功率和性能测量（PPM）接口数据结构的指令，该接口数据结构包括错误注入表结构以向OS提供错误注入服务。

公开(公告)号：US09015388B2

公开(公告)日：2015-04-21

申请号：US13930643

申请日：2013-06-28

Applicant: Intel Corporation

Inventor： Murugasamy Nachimuthu ,  Mohan Kumar ,  Dimitrios Ziakas

IPC: G06F3/06 ,  G06F12/14 ,  G06F21/57 ,  G06F13/38

CPC classification number: G06F12/1408 ,  G06F21/575 ,  G06F21/78

Abstract: In an embodiment, a computing device may include a control unit. The control unit may acquire a request from a central processing unit (CPU), contained in the computing device, that may be executing a basic input/output system (BIOS) associated with the computing device. The request may include a request for a value that may represent a maximum authorized storage size for a storage contained in the computing device. The control unit may generate the value and send the value to the CPU. The CPU may generate a system address map based on the value. The CPU may send the system address map to the control unit which may acquire the system address map and configure an address decoder, contained in the computing device, based on the acquired system address map.

Abstract translation: 在一个实施例中，计算设备可以包括控制单元。 控制单元可以从包含在计算设备中的中央处理单元（CPU）获取可能正在执行与计算设备相关联的基本输入/输出系统（BIOS）的请求。 请求可以包括对可能表示包含在计算设备中的存储的最大授权存储大小的值的请求。 控制单元可以生成值并将值发送到CPU。 CPU可以基于该值生成系统地址映射。 CPU可以将系统地址映射发送到控制单元，控制单元可以基于所获取的系统地址映射来获取系统地址映射并且配置包含在计算设备中的地址解码器。

公开(公告)号：US08762778B2

公开(公告)日：2014-06-24

申请号：US13891022

申请日：2013-05-09

Applicant: Intel Corporation

Inventor： Mohan Kumar ,  Sarathy Jayakumar

IPC: G06F11/00

CPC classification number: G06F11/34 ,  G06F11/0706 ,  G06F11/0769

Abstract: A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error record format is constructed. The error record is made available to an operating system (OS) within the computer system.

Abstract translation: 已经公开了计算机系统中的固件辅助错误处理方案。 在一个实施例中，响应于系统管理中断（SMI）陷阱，固件用于访问计算机系统内的一个或多个硬件特定的错误寄存器。 使用固件，构建一个常见错误记录格式的错误记录。 错误记录可用于计算机系统内的操作系统（OS）。

公开(公告)号：US09396059B2

公开(公告)日：2016-07-19

申请号：US14135570

申请日：2013-12-19

Applicant: INTEL CORPORATION

Inventor： Ashok Raj ,  Mohan Kumar ,  Narayan Ranganathan

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/30

CPC classification number: G06F11/0793 ,  G06F11/0706 ,  G06F11/0766 ,  G06F11/0787 ,  G06F11/30 ,  G06F11/3003

Abstract: A computing system can include a platform firmware to monitor hardware errors and to notify an operating system when a corrective action is to be performed to address a hardware error. The computing system can also include an extended error log to describe a hardware error. The computing system can further include an action record to direct the operating system to perform the corrective action to address the hardware error.

Abstract translation: 计算系统可以包括用于监视硬件错误的平台固件，并且当执行纠正措施以解决硬件错误时通知操作系统。 计算系统还可以包括扩展错误日志来描述硬件错误。 计算系统还可以包括动作记录，以指示操作系统执行纠正措施来解决硬件错误。

公开(公告)号：US12223308B2

公开(公告)日：2025-02-11

申请号：US18040147

申请日：2020-08-25

Applicant: Intel Corporation

Inventor： Mohan Kumar ,  Sarathy Jayakumar ,  Brett Peng Wang ,  Ashok Raj ,  Murugasamy Nachimuthu

IPC: G06F8/65 ,  G06F8/654 ,  G06F8/656 ,  G06F9/4401

Abstract: Methods, apparatus, systems, and articles of manufacture to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset are disclosed. An example apparatus includes an advanced configuration and power interface (ACPI) to: initiate a pseudo-sleep event in response to identifying a firmware update; and assert a power button event, the power button event to cause an operating system (OS) to prepare to enter into a sleep state; a basic input/output system (BIOS) to: initiate a warm reset in response to the OS preparing to enter the sleep state, the warm reset to update firmware according to the firmware update; and transmit a wake vector to the OS to continue operation.

公开(公告)号：US20230305834A1

公开(公告)日：2023-09-28

申请号：US18040147

申请日：2020-08-25

Applicant: Intel Corporation

Inventor： Mohan Kumar ,  Sarathy Jayakumar ,  Brett Peng Wang ,  Ashok Raj ,  Murugasamy Nachimuthu

IPC: G06F8/65 ,  G06F9/4401

CPC classification number: G06F8/65 ,  G06F9/4418

Abstract: Methods, apparatus, systems, and articles of manufacture to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm reset are disclosed. An example apparatus includes an advanced configuration and power interface (ACPI) to: initiate a pseudo-sleep event in response to identifying a firmware update; and assert a power button event, the power button event to cause an operating system (OS) to prepare to enter into a sleep state; a basic input/output system (BIOS) to: initiate a warm reset in response to the OS preparing to enter the sleep state, the warm reset to update firmware according to the firmware update; and transmit a wake vector to the OS to continue operation.

公开(公告)号：US11706158B2

公开(公告)日：2023-07-18

申请号：US17510077

申请日：2021-10-25

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Anil Rao ,  Suraj Prabhakaran ,  Mohan Kumar ,  Karthik Kumar

IPC: H04L49/25 ,  H04L12/66 ,  H04L47/33 ,  H04L49/20 ,  H04L41/5019 ,  H04L41/0823

CPC classification number: H04L49/25 ,  H04L12/66 ,  H04L41/0823 ,  H04L41/5019 ,  H04L47/33 ,  H04L49/205

Abstract: Technologies for accelerating edge device workloads at a device edge network include a network computing device which includes a processor platform that includes at least one processor which supports a plurality of non-accelerated function-as-a-service (FaaS) operations and an accelerated platform that includes at least one accelerator which supports a plurality of accelerated FaaS (AFaaS) operation. The network computing device is configured to receive a request to perform a FaaS operation, determine whether the received request indicates that an AFaaS operation is to be performed on the received request, and identify compute requirements for the AFaaS operation to be performed. The network computing device is further configured to select an accelerator platform to perform the identified AFaaS operation and forward the received request to the selected accelerator platform to perform the identified AFaaS operation. Other embodiments are described and claimed.

公开(公告)号：US20220224657A1

公开(公告)日：2022-07-14

申请号：US17510077

申请日：2021-10-25

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Anil Rao ,  Suraj Prabhakaran ,  Mohan Kumar ,  Karthik Kumar

IPC: H04L49/25 ,  H04L12/66 ,  H04L47/33 ,  H04L49/20 ,  H04L41/5019 ,  H04L41/0823

Abstract: Technologies for accelerating edge device workloads at a device edge network include a network computing device which includes a processor platform that includes at least one processor which supports a plurality of non-accelerated function-as-a-service (FaaS) operations and an accelerated platform that includes at least one accelerator which supports a plurality of accelerated FaaS (AFaaS) operation. The network computing device is configured to receive a request to perform a FaaS operation, determine whether the received request indicates that an AFaaS operation is to be performed on the received request, and identify compute requirements for the AFaaS operation to be performed. The network computing device is further configured to select an accelerator platform to perform the identified AFaaS operation and forward the received request to the selected accelerator platform to perform the identified AFaaS operation. Other embodiments are described and claimed.