公开(公告)号：US20190041969A1

公开(公告)日：2019-02-07

申请号：US15969198

申请日：2018-05-02

Applicant: Intel Corporation

Inventor： Chee Lim Nge ,  James G. Hermerding, II ,  Pronay Dutta ,  Joshua Resch

IPC: G06F1/32 ,  G06F9/48

Abstract: In one embodiment, a processor includes: a plurality of processing elements to perform operations; a power management agent (PMA) coupled to the plurality of processing elements to control power consumption of the plurality of processing elements; and a throttling circuit coupled to the PMA. The throttling circuit is to determine a throttling power level for the plurality of processing elements based at least in part on translation information communicated from the PMA. Other embodiments are described and claimed.

公开(公告)号：US09904349B2

公开(公告)日：2018-02-27

申请号：US14671721

申请日：2015-03-27

Applicant: Intel Corporation

Inventor： Pronay Dutta ,  Krishna Kumar Ganesan

IPC: G06F1/00 ,  G06F1/32 ,  G06F9/44

CPC classification number: G06F1/3287 ,  G06F1/3206 ,  G06F1/3209 ,  G06F9/4418 ,  Y02D10/171 ,  Y02D10/44 ,  Y02D50/20

Abstract: Technologies for managing the power usage of components of a computing device, while the components and the computing device are in a low-power state, such as a connected standby state. An embedded controller includes a wake-up timer designed to wake up the embedded controller during a low-power state to allow the embedded controller to perform its tasks. A power control system is configured to dynamically alter the timing cycle of the wake-up timer of the embodied controller based on operation data received. The dynamically altered timing cycle is designed to conserve power, but maintain functionality of the embedded controller.

公开(公告)号：US20160274722A1

公开(公告)日：2016-09-22

申请号：US15035338

申请日：2013-12-26

Applicant: David M. PUTZOLU ,  Brian E. WOODRUFF ,  Cheng FENG ,  Kevin S. RHODES ,  Xiang ZHOU ,  Kevy S. ZHANG ,  Pronay DUTTA ,  INTEL CORPORATION

Inventor： David M. Putzolu ,  Brian E. Woodruff ,  Cheng Feng ,  Kevin S. Rhodes ,  Xiang Zhou ,  Kevy S. Zhang ,  Pronay Dutta

IPC: G06F3/041 ,  G06F3/038 ,  G06F3/023 ,  G06F3/0354 ,  G06F1/16

CPC classification number: G06F3/0416 ,  G06F1/1616 ,  G06F1/1618 ,  G06F1/1694 ,  G06F3/023 ,  G06F3/03547 ,  G06F3/038 ,  H04M1/0241 ,  H04M2250/12

Abstract: According to one embodiment, a device includes control logic, at least a portion of which is implemented in hardware, to process motion data, the motion data collected from a first accelerometer in a base unit and from a second accelerometer in a display panel attached to a base unit of a mobile device, to determine whether the display panel moves relative to the base unit and to temporarily ignore or disable one or more input devices of the mobile device for a predetermined period of time to avoid unintentional user interaction with the mobile device during the movement of the display panel.

Abstract translation: 根据一个实施例，一种设备包括控制逻辑，其至少一部分以硬件实现，以处理运动数据，从基本单元中的第一加速度计收集的运动数据和附加到 移动设备的基本单元，用于确定显示面板相对于基本单元是否移动，并且在预定时间段内临时忽略或禁用移动设备的一个或多个输入设备，以避免与移动设备的无意的用户交互 在显示面板的移动期间。

公开(公告)号：US09417801B2

公开(公告)日：2016-08-16

申请号：US14227735

申请日：2014-03-27

Applicant: Intel Corporation

Inventor： Nicholas J. Adams ,  Robert E. Gough ,  Sai Prasad Paithara Balagangadhara ,  Pronay Dutta

IPC: G06F3/00 ,  G06F3/06 ,  G06F13/24 ,  G06F13/38

CPC classification number: G06F3/0611 ,  G06F3/0659 ,  G06F3/0673 ,  G06F13/105 ,  G06F13/24 ,  G06F13/385

Abstract: Technologies for virtual general purpose I/O (GPIO) include a computing device having a virtual GPIO controller driver, a virtual GPIO controller firmware interface, and a virtual GPIO controller. The driver receives a GPIO command from an operating system of the computing device. The GPIO command specifies an operation to be performed by a GPIO pin. The driver sends the GPIO command to the firmware interface. In response to the firmware interface receiving the command, the virtual GPIO controller emulates a virtual GPIO pin to implement the GPIO command. The firmware interface may trigger an interrupt that can be received by the operating system. The virtual GPIO controller may emulate the virtual GPIO pin using firmware-reserved backing memory, an embedded controller, or an interface to a peripheral device of the computing device. The firmware interface may be an ACPI control method. Other embodiments are described and claimed.

Abstract translation: 用于虚拟通用I / O（GPIO）的技术包括具有虚拟GPIO控制器驱动程序，虚拟GPIO控制器固件接口和虚拟GPIO控制器的计算设备。 驱动程序从计算设备的操作系统接收GPIO命令。 GPIO命令指定要由GPIO引脚执行的操作。 驱动程序将GPIO命令发送到固件界面。 响应固件接口接收命令，虚拟GPIO控制器仿真虚拟GPIO引脚来实现GPIO命令。 固件接口可能会触发操作系统可以接收的中断。 虚拟GPIO控制器可以使用固件保留后备内存，嵌入式控制器或与计算设备的外围设备的接口来模拟虚拟GPIO引脚。 固件接口可以是ACPI控制方法。 描述和要求保护其他实施例。