公开(公告)号：US20250048557A1

公开(公告)日：2025-02-06

申请号：US18718557

申请日：2022-12-09

Applicant: LG INNOTEK CO., LTD.

Inventor： Soo Min LEE ,  Jong Bae SHIN ,  Jae Hun JEONG ,  Ji Chul JUNG

IPC: H05K1/18 ,  H01L21/48 ,  H01L23/13 ,  H01L23/498 ,  H01L23/552 ,  H05K1/02 ,  H05K1/11 ,  H05K3/46

Abstract: A circuit board according to an embodiment includes a first insulating layer; and a second insulating layer disposed on an upper surface of the first insulating layer, wherein the second insulating layer includes a cavity, and the cavity has a planar shape including a plurality of convex parts convex toward an inner direction of the second insulating layer.

公开(公告)号：US20240407103A1

公开(公告)日：2024-12-05

申请号：US18723616

申请日：2022-12-23

Applicant: LG INNOTEK CO., LTD.

Inventor： Chae Young YOU ,  Soo Min LEE ,  Jae Hun JEONG

IPC: H05K1/18 ,  H01L23/00 ,  H01L23/13 ,  H05K1/11

Abstract: A circuit board according to an embodiment includes a first insulating layer; and a second insulating layer disposed on the first insulating layer and including a cavity; wherein the second insulating layer includes a lower surface of the cavity positioned higher than an upper surface of the first insulating layer, wherein the lower surface of the cavity includes: a plurality of first portions, and a plurality of second portions provided between the plurality of first portions and having a height different from that of the plurality of first portions, and wherein a height difference between a portion having a highest height and a portion having a lowest height of the plurality of first portions is 1 μm or less.

公开(公告)号：US20240282685A1

公开(公告)日：2024-08-22

申请号：US18682829

申请日：2022-08-10

Applicant: LG INNOTEK CO., LTD.

Inventor： Jae Hun JEONG ,  Jong Bae SHIN ,  Soo Min LEE

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49822 ,  H01L21/481 ,  H01L23/49838 ,  H01L23/3121 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/13101 ,  H01L2224/13105 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1316 ,  H01L2224/16227 ,  H01L2224/29101 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/2912 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2916 ,  H01L2224/32227 ,  H01L2924/01048 ,  H01L2924/014

Abstract: A circuit board according to an embodiment includes a first insulating layer, a first circuit pattern layer disposed on the first insulating layer; and a second insulating layer disposed on the first insulating layer and the first circuit pattern layer, wherein the second insulating layer includes a first region including a cavity and a second region excluding the first region, wherein the first region of the second insulating layer includes a first portion concave toward a lower surface of the second insulating layer, and a second portion convex toward an upper surface of the second insulating layer.

公开(公告)号：US20230328886A1

公开(公告)日：2023-10-12

申请号：US18026917

申请日：2021-09-17

Applicant: LG INNOTEK CO., LTD.

Inventor： Jong Bae SHIN ,  Soo Min LEE ,  Jae Hun JEONG

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K1/111 ,  H05K1/185 ,  H05K1/183 ,  H05K3/4697

Abstract: A circuit board according to an embodiment includes a first insulating layer; a first circuit pattern disposed on the first insulating layer; and a second insulating layer disposed on the first insulating layer and including a cavity, wherein an upper surface of the first insulating layer includes a first region that does not vertically overlap the cavity; a second region vertically overlapping the cavity; and a boundary region between the first region and the second region, the first circuit pattern includes a first-first circuit pattern disposed on the boundary region of the first insulating layer, the first-first circuit pattern includes a first portion that does not vertically overlap the cavity; and a second portion connected to the first portion and vertically overlapping the cavity, and a thickness of the first portion of the first-first circuit pattern is different from a thickness of the second portion of the first-first circuit pattern.