Clock rate matching for independent networks

    公开(公告)号:DE4244920C2

    公开(公告)日:2003-05-08

    申请号:DE4244920

    申请日:1992-02-10

    Applicant: MOTOROLA INC

    Abstract: The clock rate matching appts for independent networks includes a memory (400), microprocessor (405) and a digital signal processor (406). A PCM signal is received by an analog/PCM block (124) and the clock (CLK1) extracted by a modem (126). The modem extracts the data and passes it to a memory (400) at the extracted clock speed. The data is clocked out of the buffer by a separate clock (CLK2). The difference in clock speeds is measured by the movement of the buffer pointers. In order to match the two clock rates, bits are added or deleted from the exit path of the memory.

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