METHOD AND APPARATUS FOR INTERFERENCE CANCELLATION IN A WIRELESS COMMUNICATION SYSTEM
    13.
    发明申请
    METHOD AND APPARATUS FOR INTERFERENCE CANCELLATION IN A WIRELESS COMMUNICATION SYSTEM 审中-公开
    无线通信系统干扰消除的方法和装置

    公开(公告)号:WO2009137250A4

    公开(公告)日:2010-02-25

    申请号:PCT/US2009040755

    申请日:2009-04-16

    Abstract: A mobile device estimates a data symbol from a received signal by using one or more interference cancellation algorithms. For one interference cancellation algorithm, the mobile device calculates (302) a Channel State Information (CSI) of an interfering sector and calculates (304) a CSI of a serving sector at a different time. The mobile device then determines (310) a correction factor to the CSI of the interfering sector by, for example, estimating a Doppler speed and a time difference between a first time interval like a preamble symbol and a second time interval like any symbol of interest in the data zone. Using the correction factor, the mobile device updates outdated interference information. The mobile device can cancel interference in the received signal distorted by co-channel interference by using the updated interference information. Also, the mobile device can be configured to combine results of multiple interference cancellation algorithms based on the applicability of the individual interference cancellation algorithms in particular scenarios.

    Abstract translation: 移动设备通过使用一个或多个干扰消除算法从接收信号估计数据符号。 对于一种干扰消除算法,移动设备计算(302)干扰扇区的信道状态信息(CSI),并在不同时间计算(304)服务扇区的CSI。 然后,移动设备通过例如估计诸如前同步码符号的第一时间间隔和像感兴趣的符号之类的第二时间间隔之间的时间差来确定(310)对干扰扇区的CSI的校正因子 在数据区。 使用校正因子,移动设备更新过时的干扰信息。 移动设备可以通过使用更新的干扰信息来消除由同信道干扰失真的接收信号中的干扰。 此外,移动设备可以被配置为基于在特定情况下各个干扰消除算法的适用性来组合多个干扰消除算法的结果。

    MULTI-LAYER CYCLIC REDUNDANCY CHECK CODE IN WIRELESS COMMUNICATION SYSTEM
    14.
    发明申请
    MULTI-LAYER CYCLIC REDUNDANCY CHECK CODE IN WIRELESS COMMUNICATION SYSTEM 审中-公开
    无线通信系统中的多层循环冗余校验码

    公开(公告)号:WO2009036004A3

    公开(公告)日:2009-05-22

    申请号:PCT/US2008075775

    申请日:2008-09-10

    CPC classification number: H03M13/09 H04L1/0061 H04L1/0065

    Abstract: A wireless communication device (200) including a first CRC coder that generates a first block of CRC parity bits on a transport block and associates the first block of CRC parity bits with the transport block, a segmenting entity that segments the transport blocks into multiple code blocks after associating, and a second coder that generates a second block of CRC parity bits on each code block and associates a second block of CRC parity bits with each code block. The first and second blocks of CRC parity bits are based on first and second generator polynomials. In one embodiment, the first and second generator polynomials are different. In another embodiment, the generator polynomials are the same and the transport block is interleaved before segmenting or the code block are interleaved before encoding with the second block of CRC parity bits.

    Abstract translation: 一种无线通信设备(200),包括第一CRC编码器和第二CRC编码器,第一CRC编码器在传输块上产生第一CRC奇偶校验位并将第一CRC奇偶校验位与传输块关联,分割实体将传输块分割成多个码 以及第二编码器,其在每个代码块上生成第二CRC奇偶校验位块,并将CRC奇偶校验位的第二块与每个代码块相关联。 CRC校验位的第一和第二块基于第一和第二生成多项式。 在一个实施例中,第一和第二生成器多项式不同。 在另一个实施例中,生成多项式相同,并且在分割之前传输块被交织,或者在用CRC奇偶校验位的第二块编码之前交织编码块。

    METHOD AND APPARATUS FOR TRANSMIT POWER CALIBRATION IN A FREQUENCY DIVISION MULTIPLEXED WIRELESS SYSTEM
    15.
    发明申请
    METHOD AND APPARATUS FOR TRANSMIT POWER CALIBRATION IN A FREQUENCY DIVISION MULTIPLEXED WIRELESS SYSTEM 审中-公开
    用于频分多路复用无线系统中的发射功率校准的方法和设备

    公开(公告)号:WO2009023726A3

    公开(公告)日:2009-04-09

    申请号:PCT/US2008073042

    申请日:2008-08-13

    Abstract: The present disclosure describes a method and apparatus for transmit power calibration in a frequency division multiplexed wireless system (100). The method may include receiving (315) an uplink scheduling grant at a user equipment (120), establishing (320) a desired power level based on at least the uplink scheduling grant, and setting (325) hardware power settings based on the desired power level. The method may also include transmitting (330) data in a first subframe at a first power level based on the hardware power settings, measuring (335) the first power level in the first subframe, and determining (340) a difference between the desired power level and the measured first power level. The method may additionally include modifying (345) the hardware power settings based on the difference and transmitting (350) at a second power level based on the modified hardware power settings in a next transmission corresponding to the transmission in the first subframe.

    Abstract translation: 本公开描述了一种用于频分多路复用无线系统(100)中的发射功率校准的方法和装置。 该方法可以包括在用户设备(120)处接收(315)上行链路调度许可,基于至少上行链路调度许可来建立(320)期望功率电平,以及基于期望功率来设置(325)硬件功率设置 水平。 该方法还可以包括基于硬件功率设置以第一功率电平在第一子帧中发送(330)数据,测量(335)第一子帧中的第一功率电平,以及确定(340)期望功率 水平和测量的第一功率水平。 该方法可以另外包括基于差异来修改(345)硬件功率设置,并且基于与第一子帧中的传输相对应的下一次传输中的修改的硬件功率设置以第二功率级别传输(350)。

    19.
    发明专利
    未知

    公开(公告)号:BRPI0718079A2

    公开(公告)日:2014-07-08

    申请号:BRPI0718079

    申请日:2007-08-28

    Applicant: MOTOROLA INC

    Abstract: A wireless communication system that communicates ( 500 ) frames having first and second sub-frames ( 510, 520 ) with time-frequency resource elements. The first sub-frame including first reference symbol information and the second sub-frame including second reference symbol information, and not more than one of the first and second sub-frames including user specific radio resource assignment information. Wireless communication entities receiving the frames process the time-frequency elements of the first sub-frame using the first reference symbol information and processing the time-frequency elements of the second sub-frame using the second reference symbol information.

    MULTI-LAYER CYCLIC REDUNDANCY CHECK CODE IN WIRELESS COMMUNICATION SYSTEM

    公开(公告)号:CA2698533C

    公开(公告)日:2014-06-17

    申请号:CA2698533

    申请日:2008-09-10

    Applicant: MOTOROLA INC

    Abstract: A communication device is disclosed. The device is configured to generate a first block of first cyclic redundancy check (CRC) parity bits on a transport block wherein the first block of CRC parity bits is based on a first generator polynomial, to attach the first block of CRC parity bits to the transport block and to segment the transport block into multiple code blocks. The processor is also configured to generate a second block of CRC parity bits on each code block wherein the second block of CRC parity bits is based on a second generator polynomial that is different than the first generator polynomial. The first and second generator polynomials have a common degree. A second block of CRC parity bits is attached to each code block and the code blocks are concatenated after channel encoding.

Patent Agency Ranking