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    THERMOELECTRIC ELEMENT DESIGN
    12.
    发明申请
    THERMOELECTRIC ELEMENT DESIGN 审中-公开
    热电元件设计

    公开(公告)号：US20130008479A1

    公开(公告)日：2013-01-10

    申请号：US13177616

    申请日：2011-07-07

    Applicant: Peng Chen

    Inventor： Peng Chen

    IPC: H01L35/32

    CPC classification number: H01L35/32

    Abstract: Thermoelectric elements having a non-uniform effective thermal conductivity include opposing contact surfaces for making electrical and thermal contact with respective hot side and cold side electrical interconnects. The contact surfaces having corresponding contact areas that are each greater than an intermediate cross-sectional area of the thermoelectric elements.

    Abstract translation: 具有不均匀有效热导率的热电元件包括​​用于与相应的热侧和冷侧电互连进行电接触和热接触的相对的接触表面。 所述接触表面具有相应的接触面积，其大于所述热电元件的中间横截面积。

    PHASE SHIFTER WITH REVERSELY CONFIGURED ELECTRIC REGULATION UNITS
    13.
    发明申请
    PHASE SHIFTER WITH REVERSELY CONFIGURED ELECTRIC REGULATION UNITS 有权
    具有反配置的电力调节单元的相位变换器

    公开(公告)号：US20120194295A1

    公开(公告)日：2012-08-02

    申请号：US13017516

    申请日：2011-01-31

    Applicant: Peng Chen ,  Nian-Qiang Liu

    Inventor： Peng Chen ,  Nian-Qiang Liu

    IPC: H01P1/18

    CPC classification number: H01P1/184 ,  H01P1/183

    Abstract: The present invention provides a phase shifter with reversely configured electric regulation units. The phase shifter has a chamber with a holding space, a first feeder unit and a second feeder unit at the sides of the holding space, and at least one reversely configured electric regulation unit. The regulation unit contains a first coupling set with a movable and a fixed coupling, and a second coupling set with a movable and a fixed coupling. A sync linkage mechanism is used to link the respective movable couplings. A push-pull unit is linked to a driven connection of the sync linkage mechanism. A cover plate seals the holding space. The phase shifter configuration makes it possible to reduce markedly the volume and space of the phase shifter, cut down the manufacturing cost and improve the mating accuracy with higher applicability.

    Abstract translation: 本发明提供一种具有反向配置的电气调节单元的移相器。 移相器具有在保持空间的侧面具有保持空间的腔室，第一馈送单元和第二馈送单元，以及至少一个反向配置的电调节单元。 调节单元包括具有可移动和固定联轴器的第一联轴器组和具有可移动和固定联轴器的第二联轴器组。 使用同步联动机构来连接相应的可动联接器。 推挽单元链接到同步连接机构的驱动连接。 盖板密封保持空间。 移相器配置使得可以显着地减小移相器的体积和空间，降低制造成本并且以更高的适用性提高配合精度。

    SOLAR CELL
    16.
    发明申请
    SOLAR CELL 有权
    太阳能电池

    公开(公告)号：US20120097236A1

    公开(公告)日：2012-04-26

    申请号：US13100310

    申请日：2011-05-04

    Applicant: Yen-Cheng Hu ,  Peng Chen ,  Tsung-Pao Chen ,  Shuo-Wei Liang ,  Zhen-Cheng Wu ,  Chien-Jen Chen

    Inventor： Yen-Cheng Hu ,  Peng Chen ,  Tsung-Pao Chen ,  Shuo-Wei Liang ,  Zhen-Cheng Wu ,  Chien-Jen Chen

    IPC: H01L31/0216

    CPC classification number: H01L31/0264 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/18 ,  Y02E10/50

    Abstract: A solar cell includes a semi-conductive substrate, a doping layer, an anti-reflection layer, an electrode, a passivation stacked layer and a contact layer. The semi-conductive substrate has a front and a back surface. The doping layer is disposed on the front surface. The anti-reflection layer is disposed on the doping layer. The electrode is disposed on the anti-reflection layer and electrically connected to the doping layer. The passivation stacked layer is disposed on the back surface and has a first dielectric layer, a second dielectric layer and a middle dielectric layer sandwiched between the first and the second dielectric layer. The dielectric constant of the middle dielectric layer is substantially lower than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer. The contact layer covers the passivation stacked layer and electrically contacts with the back surface of the semi-conductive substrate.

    Abstract translation: 太阳能电池包括半导体基板，掺杂层，抗反射层，电极，钝化堆叠层和接触层。 半导体基板具有前表面和后表面。 掺杂层设置在前表面上。 抗反射层设置在掺杂层上。 电极设置在抗反射层上并与掺杂层电连接。 钝化堆叠层设置在背面上，并且具有夹在第一和第二电介质层之间的第一电介质层，第二电介质层和中间电介质层。 中间介电层的介电常数基本上低于第一介电层的介电常数和第二介质层的介电常数。 接触层覆盖钝化堆叠层并与半导体基板的背面电接触。

    Audio test apparatus and test method thereof
    17.
    发明授权
    Audio test apparatus and test method thereof 失效
    音频测试装置及其测试方法

    公开(公告)号：US08073146B2

    公开(公告)日：2011-12-06

    申请号：US12168916

    申请日：2008-07-08

    Applicant: Hua-Dong Cheng ,  Wen-Chuan Lian ,  Yao Zhao ,  Jian Sun ,  Peng Chen ,  Wen-Sheng Tsai

    Inventor： Hua-Dong Cheng ,  Wen-Chuan Lian ,  Yao Zhao ,  Jian Sun ,  Peng Chen ,  Wen-Sheng Tsai

    IPC: H04R29/00

    CPC classification number: H04R29/001

    Abstract: An audio test apparatus, and an exemplary audio test method that includes: processing an audio file through two independent channels; outputting no signals from a left channel and from a right channel in a first time period; receiving noise signals from the left and right channels; outputting single-frequency signals from the left channel only in a second time period; receiving the single-frequency signals from the left channel and crosstalk signals from the right channel; outputting multi-frequency signals from the left and right channels in a third time period; receiving the multi-frequency signals from the left and right channels; outputting single-frequency signals from the right channel only in a fourth time period; receiving the crosstalk signals from the left channel and the single-frequency signals from the right channel; and testing parameters according to the signals received during the four time periods.

    Abstract translation: 音频测试装置和示例性音频测试方法，其包括：通过两个独立信道处理音频文件; 在第一时间段内不从左声道和右声道输出信号; 从左右声道接收噪声信号; 仅在第二时间段内从左声道输出单频信号; 从左声道接收单频信号和来自右声道的串扰信号; 在第三时间段内从左右声道输出多频信号; 从左右声道接收多频信号; 仅在第四时间段内从右声道输出单频信号; 接收来自左声道的串扰信号和来自右声道的单频信号; 并根据在四个时间段期间接收的信号测试参数。

    METHODS AND APPARATUSES FOR TRANSMITTING DOWNLINK CONTROL SIGNALING ON WIRELESS RELAY LINK
    18.
    发明申请
    METHODS AND APPARATUSES FOR TRANSMITTING DOWNLINK CONTROL SIGNALING ON WIRELESS RELAY LINK 有权
    用于在无线中继链路上发送下行链路控制信号的方法和装置

    公开(公告)号：US20100214972A1

    公开(公告)日：2010-08-26

    申请号：US12390267

    申请日：2009-02-20

    Applicant: Xiang Guang Che ,  Peng Chen ,  Chun Yan Gao ,  Jing Han ,  Bernhard Raaf ,  Hai Ming Wang ,  Erlin Zeng

    Inventor： Xiang Guang Che ,  Peng Chen ,  Chun Yan Gao ,  Jing Han ,  Bernhard Raaf ,  Hai Ming Wang ,  Erlin Zeng

    IPC: H04B7/14 ,  H04W72/04

    CPC classification number: H04W72/0406 ,  H04B7/2606 ,  H04L5/0053 ,  H04W72/0426 ,  H04W84/047

    Abstract: In accordance with an example embodiment of the present invention, a method comprises allocating a control channel resource in a wireless relay transmission frame on a wireless relay link; generating a control signaling based on at least one of a resource allocation scheme, a status of the wireless relay link and a traffic condition of the wireless relay link; mapping the control signaling to the allocated control channel resource via at least one of a time-first mapping, a frequency-first mapping, and a multiplexing mapping; and transmitting the control signaling in the allocated control channel resource on the wireless relay link to at least one associated relay node.

    Abstract translation: 根据本发明的示例性实施例，一种方法包括在无线中继链路上的无线中继传输帧中分配控制信道资源; 基于资源分配方案，无线中继链路的状态和无线中继链路的业务状况中的至少一个来生成控制信令; 通过时间优先映射，频率优先映射和复用映射中的至少一个将控制信令映射到所分配的控制信道资源; 以及将所述无线中继链路上所分配的控制信道资源中的控制信令发送到至少一个相关联的中继节点。

    Method and apparatus for detecting clock frequency deviation
    19.
    发明申请
    Method and apparatus for detecting clock frequency deviation 有权
    检测时钟频率偏差的方法和装置

    公开(公告)号：US20100166131A1

    公开(公告)日：2010-07-01

    申请号：US12646671

    申请日：2009-12-23

    Applicant: Bo Li ,  Shiqing Hu ,  Peng Chen

    Inventor： Bo Li ,  Shiqing Hu ,  Peng Chen

    IPC: H04L7/00

    CPC classification number: G01R23/02

    Abstract: The embodiment of the present disclosure discloses a method and apparatus for detecting frequency deviation of a clock. The method includes: counting the clock to be detected to acquire current counting information; filtering the current counting information to acquire filtered data; and acquiring the frequency deviation of the clock to be detected from the filtered data. According to the embodiments of the present disclosure, the detection accuracy of frequency deviation is improved by filtering the counting information acquired by counting the clock to be detected, and appropriately increasing an amount of information after the filtering, so as to perceive the occurrence of any abnormal dithering, and avoid neglecting of any abnormal condition in periodic or aperiodic queries.

    Abstract translation: 本公开的实施例公开了一种用于检测时钟的频率偏差的方法和装置。 该方法包括：对要检测的时钟进行计数以获取当前的计数信息; 过滤当前计数信息以获得过滤数据; 并从滤波后的数据获取要检测的时钟的频率偏差。 根据本公开的实施例，通过对通过对要检测的时钟进行计数而获取的计数信息进行滤波，并适当地增加滤波后的信息量来提高频偏的检测精度，以便感知任何 异常抖动，并避免在周期性或非周期性查询中忽略任何异常情况。

    GROUP III NITRIDE WHITE LIGHT EMITTING DIODE
    20.
    发明申请
    GROUP III NITRIDE WHITE LIGHT EMITTING DIODE 失效
    第III组氮化物白光发光二极管

    公开(公告)号：US20090302308A1

    公开(公告)日：2009-12-10

    申请号：US12442180

    申请日：2006-09-22

    Applicant: Soo-Jin Chua ,  Peng Chen ,  Zhen Chen ,  Eiryo Takasuka

    Inventor： Soo-Jin Chua ,  Peng Chen ,  Zhen Chen ,  Eiryo Takasuka

    IPC: H01L29/06

    CPC classification number: H01L33/06 ,  B82Y20/00 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L33/305 ,  H01L33/32 ,  H01S5/3412 ,  H01S5/34333

    Abstract: A white-light emitting diode comprises an n-type semiconductor layer, one or more quantum well structures formed over the n-type semiconductor layer, a p-type semiconductor layer formed on the quantum well structure, a first electrode formed on the p-type semiconductor, and a second electrode formed on at least a portion of the n-type semiconductor layer. Each quantum well structure includes an InxGa1-xN quantum well layer, an InyGa1-yN barrier layer (x>0.3 or x=0.3), and InzGa1-zN quantum dots, where x

    Abstract translation: 白色发光二极管包括n型半导体层，在n型半导体层上形成的一个或多个量子阱结构，形成在量子阱结构上的p型半导体层，形成在p型半导体层上的第一电极， 和形成在n型半导体层的至少一部分上的第二电极。 每个量子阱结构包括In x Ga 1-x N量子阱层，In y Ga 1-y N势垒层（x> 0.3或x = 0.3）和In x Ga 1-z N量子点，其中x

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