公开(公告)号：EP2013772B1

公开(公告)日：2018-07-11

申请号：EP07761490.7

申请日：2007-04-27

Applicant: Qualcomm Incorporated

Inventor： SHIH, Garret Webster

IPC: G06F17/14 ,  H04L27/26

CPC classification number: G06F17/142 ,  H04L27/265

Abstract: A processor for performing a fast Fourier transform or inverse fast Fourier transform comprises a radix-2 butterfly structure; and a radix-4 butterfly structure. A method of performing a fast Fourier transform or inverse fast Fourier transform comprises selectively performing a radix-2 butterfly operation on an input data stream; and selectively performing a radix-4 butterfly operation on one of a result produced by the radix-2 butterfly operation and the input data stream. Apparatus for performing a fast Fourier transform or inverse fast Fourier transform comprises means for selectively performing a radix-2 butterfly operation on an input data stream; and means for selectively performing a radix-4 butterfly operation on one of a result produced by the radix-2 butterfly operation and the input data stream. A communication device for transmitting or receiving information, including an inverse fast Fourier transform module or fast Fourier transform module, comprises a radix-2 butterfly structure having inputs and outputs; a radix-4 butterfly structure having inputs coupled to the radix-2 butterfly structure outputs; and a multiplexer alternately coupling the data stream to the inputs of the radix-2 butterfly structure or to the inputs of the radix-4 butterfly structure, whereby the module can perform two different resolution inverse fast Fourier transforms or fast Fourier transforms dependent on the inputs selected.

公开(公告)号：EP2896250A1

公开(公告)日：2015-07-22

申请号：EP13756761.6

申请日：2013-08-16

Applicant: Qualcomm Incorporated

Inventor： MATHEW, Deepak ,  SHIH, Garret Webster ,  FRIDMAN, Jose ,  BROWN, Robin Lee

IPC: H04W52/02

CPC classification number: H04W52/02 ,  H04W52/0245 ,  H04W52/028 ,  H04W52/0287 ,  Y02D70/00 ,  Y02D70/1222 ,  Y02D70/1242 ,  Y02D70/1262 ,  Y02D70/142 ,  Y02D70/146

Abstract: A system and method dynamically scale power consumed by the circuitry of an electronic device based on channel state and/or data rate. The electronic device then operates according to the power scaling. The scaling may be in accordance with an effective data rate, a number of multiple input multiple output (MIMO) layers, receiver type, a cell scenario, or a number of carriers. A number of MIMO layers can be predicted based on at least one of channel conditions or a channel quality index (CQI).

Abstract translation: 系统和方法基于信道状态和/或数据速率来动态地缩放由电子设备的电路消耗的功率。 电子设备然后根据功率缩放来操作。 缩放可以根据有效数据速率，多输入多输出（MIMO）层，接收器类型，单元方案或多个载波来实现。 可以基于信道条件或信道质量指数（CQI）中的至少一个来预测多个MIMO层。