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公开(公告)号:US20240178795A1
公开(公告)日:2024-05-30
申请号:US18060295
申请日:2022-11-30
Applicant: Qualcomm Incorporated
Inventor: Mohamed Abouzied , Chuan Wang , Anosh Davierwalla , Muhammad Hassan , Vinod Panikkath , Li Liu
CPC classification number: H03D7/1491 , H04B17/21
Abstract: An apparatus is disclosed for oscillator feedthrough calibration, such as a component arrangement that can be calibrated to account for signal leakage from an oscillator coupled to a mixer circuit. In example aspects, the apparatus includes a mixer circuit having a first stage, a second stage, and tuning circuitry. The first stage includes at least one transistor coupled between a mixer input and a mixer output. The second stage includes one or more transistors coupled between the at least one transistor of the first stage and the mixer output. The one or more transistors are also coupled between a local oscillator signal input and the mixer output. The tuning circuitry includes at least one current source coupled to the at least one transistor of the first stage.
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公开(公告)号:US11750253B2
公开(公告)日:2023-09-05
申请号:US17464404
申请日:2021-09-01
Applicant: QUALCOMM Incorporated
Inventor: Chuan Wang , Bhushan Shanti Asuri , Li Liu , Vinod Panikkath
CPC classification number: H04B7/0602 , H04B1/0483 , H04B2001/0491
Abstract: In certain aspects, a method includes receiving a first intermediate frequency (IF) signal and a second IF signal via a common input, upconverting the first IF signal into a first radio frequency (RF) signal, transmitting the first RF signal via a first antenna array, upconverting the second IF signal into a second RF signal, and transmitting the second RF signal via a second antenna array. In a first transit mode, the first RF signal is in a first frequency band and the second RF signal is in a second frequency band, and, in a second transmit mode, the first RF signal and the second RF signal are both in the first frequency band.
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公开(公告)号:US10862461B1
公开(公告)日:2020-12-08
申请号:US16431943
申请日:2019-06-05
Applicant: QUALCOMM Incorporated
Inventor: Tonmoy Biswas , Sreenivasa Mallia , Krishnaswamy Thiagarajan , Ashok Swaminathan , Vinod Panikkath
Abstract: Certain aspects of the present disclosure are directed to a circuit for switch control. The circuit generally includes a plurality of flip-flops, each of the plurality of flip-flops having an input coupled to a respective one of a plurality of enable signals, a NOR gate having inputs coupled to outputs of the plurality of flip-flops; a plurality of AND gates, each having an input coupled to a respective one of the plurality of enable signals and having another input coupled to an output of the NOR gate, and a delay element coupled between the output of the NOR gate and reset inputs of the plurality of flip-flops.
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