公开(公告)号：EP1933316A2

公开(公告)日：2008-06-18

申请号：EP07122185.7

申请日：2007-12-03

Applicant: STMicroelectronics S.r.l.

Inventor： Rizzo Piazza Roncoroni, Alessandra Maria ,  Tronconi, Michele ,  Pasolini, Fabio

IPC: G11B19/04

CPC classification number: G11B19/043

Abstract: A device for protecting an electronic apparatus includes: a motion-detection device (7, 8, 9), for supplying at least one alert signal (S FF , S R ) in response to pre-determined conditions of motion of the protection device; a counter (18); a first logic circuit (19; 219), for incrementing the counter (18) in the presence of a first value ("1") of the alert signal (S FF , S R ), in a first operating condition; and a second logic circuit (20), for generating a protection signal (INT) on the basis of a count value (C) of the counter (18). In addition, the first logic circuit (19; 219) is configured for decrementing the counter in the presence of a second value ("0") of the alert signal (S FF , S R ), in the first operating condition.

Abstract translation: 一种用于保护对抗电子设备装置，包括：运动检测装置（7，8,9），用于响应于提供至少一个警报信号（S FF，S R）预先确定的保护设备的运动条件; 一个计数器（18）; 在警报信号（S FF，S R）的第一值（“1”）的存在下使计数器递增（18），在第一操作状态;一个第一逻辑电路（219 19）; 和用于生成所述计数器（18）的计数值（C）的基础上，一个保护信号（INT）的第二逻辑电路（20）。 此外，第一逻辑电路（19; 219）被配置用于递减所述计数器在所述警告信号（S FF，S R）的第二值（“0”）的存在下，在第一操作条件。

公开(公告)号：EP1770368A8

公开(公告)日：2007-08-01

申请号：EP05425683.9

申请日：2005-10-03

Applicant: STMicroelectronics S.r.l.

Inventor： Pasolini, Fabio ,  Binda, Ivo

IPC: G01C22/00

CPC classification number: G01C22/006

Abstract: In a pedometer device (1), for detecting and counting steps of a user on foot, an accelerometer sensor (2) detects a vertical acceleration generated during the step. A processing unit (3) is connected to the accelerometer sensor (2), processes an acceleration signal (CalAcc) relating to the acceleration (A) in order to detect the occurrence of a step, and in particular compares the acceleration signal (CalAcc) with a first reference threshold (S + ). The processing unit (3) automatically adapts the first reference threshold (S + ) as a function of the acceleration signal (CalAcc). In particular, the processing unit (3) modifies the first reference threshold (S + ) as a function of an envelope (Env + ) of the amplitude of the acceleration signal.

公开(公告)号：EP1770368B1

公开(公告)日：2009-05-27

申请号：EP05425683.9

申请日：2005-10-03

Applicant: STMicroelectronics S.r.l.

Inventor： Pasolini, Fabio ,  Binda, Ivo

IPC: G01C22/00

CPC classification number: G01C22/006

公开(公告)号：EP1708362B1

公开(公告)日：2008-12-31

申请号：EP05425184.8

申请日：2005-03-31

Applicant: STMicroelectronics S.r.l.

Inventor： Tronconi, Michele ,  Chiesa, Enrico ,  Pasolini, Fabio

IPC: G06F3/033 ,  G01P15/08 ,  G01P15/18 ,  H03H17/04

CPC classification number: H03H17/04 ,  G01P15/0891 ,  G01P15/18

Abstract: A digital high-pass filter (12) has an input (IN), an output (OUT), and a subtractor stage (20), having a first input terminal, a second input terminal and an output terminal. The first input terminal of the subtractor stage (20) is connected to the input (IN) of the digital high-pass filter (12) and the output terminal is connected to the output (OUT) of the digital high-pass filter (12). A recursive circuit branch (21) is connected between the output (OUT) of the digital high-pass filter (12) and the second input terminal of the subtractor stage (20). Within the recursive circuit branch (21) are cascaded an accumulation stage (23), constituted by an integrator circuit, and a divider stage (24). The cutoff frequency (f t ) of the digital high-pass filter (12) is variable according to a dividing factor (den) of the divider stage (24) .

公开(公告)号：EP1708362A1

公开(公告)日：2006-10-04

申请号：EP05425184.8

申请日：2005-03-31

Applicant: STMicroelectronics S.r.l.

Inventor： Tronconi, Michele ,  Chiesa, Enrico ,  Pasolini, Fabio

IPC: H03H17/04

CPC classification number: H03H17/04 ,  G01P15/0891 ,  G01P15/18

Abstract: A digital high-pass filter (12) has an input (IN), an output (OUT), and a subtractor stage (20), having a first input terminal, a second input terminal and an output terminal. The first input terminal of the subtractor stage (20) is connected to the input (IN) of the digital high-pass filter (12) and the output terminal is connected to the output (OUT) of the digital high-pass filter (12). A recursive circuit branch (21) is connected between the output (OUT) of the digital high-pass filter (12) and the second input terminal of the subtractor stage (20). Within the recursive circuit branch (21) are cascaded an accumulation stage (23), constituted by an integrator circuit, and a divider stage (24). The cutoff frequency (f t ) of the digital high-pass filter (12) is variable according to a dividing factor (den) of the divider stage (24) .

Abstract translation: 数字高通滤波器（12）具有输入（IN），输出（OUT）和减法器级（20），具有第一输入端，第二输入端和输出端。 减法器级（20）的第一输入端连接到数字高通滤波器（12）的输入端（IN），输出端连接到数字高通滤波器（12）的输出（OUT） ）。 递归电路分支（21）连接在数字高通滤波器（12）的输出（OUT）和减法器级（20）的第二输入端之间。 在递归电路支路（21）内，级联由积分器电路和分频器级（24）组成的累加级（23）。 数字高通滤波器（12）的截止频率（f t）根据分频器级（24）的分频系数（den）可变。

公开(公告)号：EP1209809A1

公开(公告)日：2002-05-29

申请号：EP00830775.3

申请日：2000-11-24

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： Hernden, Charles G. ,  Pasolini, Fabio

IPC: H03K5/15 ,  H03M3/02

CPC classification number: H03K5/15 ,  G11B20/10 ,  H03K5/135 ,  H03K2005/00247 ,  H03L7/06

Abstract: A device for generating synchronous numeric signals, including a reference generating device supplying a reference signal and a first timing signal (T 1 ), both having a reference frequency (F 1 ); and a timed generating device (30,31,35) supplying a synchronized signal (S ACC ) having the reference frequency (F 1 ). The device further includes a synchronization stage generating a second timing signal (T 2 ) having a first controlled frequency (F 2 ) correlated to the reference frequency (F 1 ), and phase synchronization pulses (T DEC ) having the first frequency (F 1 ) and a preset delay (K) programmable with respect to the first timing signal (T 1 ).

Abstract translation: 一种用于产生同步数字信号的装置，包括提供参考信号的参考产生装置和具有参考频率（F1）的第一定时信号（T1）; 以及提供具有参考频率（F1）的同步信号（SACC）的定时发生装置（30,31,35）。 该装置还包括产生具有与基准频率（F1）相关的第一受控频率（F2）的第二定时信号（T2）的同步级，以及具有第一频率（F1）和预定延迟的相位同步脉冲（TDEC） （K）相对于第一定时信号（T1）可编程。

公开(公告)号：EP1209677A1

公开(公告)日：2002-05-29

申请号：EP00830776.1

申请日：2000-11-24

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： Pasolini, Fabio ,  Lasalandra, Ernesto ,  Bendiscioli, Paolo ,  Hernden, Charles G.

IPC: G11B20/10 ,  G11B20/24 ,  G11B5/596 ,  G11B5/55

CPC classification number: G11B20/10009 ,  G11B20/24

Abstract: A noise compensating device in a discrete time control system, for a R/W system for hard disks, including: a control loop (21-24) generating a first timing signal (T 1 ), a signal indicative of a quantity to be controlled (S POS ), and a control signal (S CONTR ), which have a first frequency (F 1 ) ; and an open loop control line (27) which generates a compensation signal (S COMP ) synchronous with the control signal (S CONTR ) and includes a sensor (17). The sensor includes a sensing element (30), generating an analog signal (V M ), an acquisition stage (31), connected to the sensing element (30) and generating a disturbance measure signal (S ACC ) correlated to the analog signal (V M ) and synchronous with the control signal (S CONTR ), and a synchronization stage (32). The synchronization stage (32) includes a frequency generator (42) having an input receiving the first timing signal (T 1 ) and a first and a second output (42b, 42c) connected to the acquisition stage (31) and generating, respectively, a second timing signal (T 2 ) and a third timing signal (T 3 ).

Abstract translation: 一种用于硬盘R / W系统的离散时间控制系统中的噪声补偿装置，包括：产生第一定时信号（T1）的控制回路（21-24），指示待控制量的信号 SPOS）和具有第一频率（F1）的控制信号（SCONTR）; 以及产生与控制信号（SCONTR）同步的补偿信号（SCOMP）的开环控制线（27），并且包括传感器（17）。 所述传感器包括感测元件（30），产生连接到感测元件（30）的模拟信号（VM），采集级（31），并产生与模拟信号（VM）相关的干扰测量信号（SACC） 并与控制信号（SCONTR）同步，以及同步级（32）。 同步级（32）包括频率发生器（42），其具有接收第一定时信号（T1）的输入和连接到采集级（31）的第一和第二输出（42b，42c），并分别产生 第二定时信号（T2）和第三定时信号（T3）。