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公开(公告)号:US20190081089A1
公开(公告)日:2019-03-14
申请号:US16124387
申请日:2018-09-07
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyun Min CHO , Shin Il CHOI , Sang Gab KIM , Su Bin BAE , Yu Gwang JEONG
IPC: H01L27/12 , H01L29/49 , H01L21/3213 , H01L29/786
Abstract: A display device includes: a substrate; first and second transistors provided on the substrate to be spaced apart from each other; and a display unit electrically connected to the first transistor, wherein the first transistor includes a first semiconductor layer including crystalline silicon, a first gate electrode, a first source electrode, and a first drain electrode, wherein the second transistor includes a second semiconductor layer including an oxide semiconductor, a second gate electrode, a second source electrode, and a second drain electrode, and wherein the second gate electrode includes a first layer that is provided on an insulating layer and includes molybdenum, a second layer that is provided on the first layer and includes titanium, and a third layer that is provided on the second layer and includes molybdenum.
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公开(公告)号:US20170278977A1
公开(公告)日:2017-09-28
申请号:US15271504
申请日:2016-09-21
Applicant: Samsung Display Co., Ltd.
Inventor: Yu-Gwang JEONG , Hyun Min CHO , Su Bin BAE , Shin Il CHOI
IPC: H01L29/786 , H01L27/12
CPC classification number: H01L29/78606 , H01L27/1218 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L29/78603 , H01L29/78633 , H01L29/7869 , H01L29/78696
Abstract: A thin film transistor array panel includes a substrate; a data line disposed on the substrate; a buffer layer disposed on the substrate and spaced apart from the data line in a plan view; a thin film transistor disposed on the buffer layer, the thin film transistor including an oxide semiconductor layer; and a pixel electrode connected to the thin film transistor.
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公开(公告)号:US20160379997A1
公开(公告)日:2016-12-29
申请号:US15175839
申请日:2016-06-07
Applicant: Samsung Display Co., Ltd.
Inventor: Jung Yun JO , Su Bin BAE , Sang Hyeon SONG , Cheol Geun AN
CPC classification number: H01L27/124 , G06F3/0416 , G06F2203/04103 , H01L27/1262
Abstract: An exemplary embodiment of the described technology relates generally to a display apparatus including a plurality of pixels and corresponding to one area of a substrate for displaying an image, and a pad area corresponding to another area of the substrate, the pad area including a lower electrode configured to transmit an electric signal to the pixels, and a plurality of pad electrodes electrically connecting the lower electrode and a driving chip, wherein each of the pad electrodes includes a first contact surface for contacting the lower electrode, a second contact surface for contacting the driving chip, and an oxide layer on a surface of the pad electrode that is exposed to the outside, and that connects the first contact surface and the second contact surface.
Abstract translation: 所描述的技术的示例性实施例一般涉及包括多个像素并且对应于用于显示图像的基板的一个区域的显示装置以及对应于该基板的另一个区域的焊盘区域,该焊盘区域包括下部电极 被配置为向所述像素发送电信号,以及电连接所述下电极和驱动芯片的多个焊盘电极,其中每个焊盘电极包括用于接触所述下电极的第一接触表面,用于接触所述下电极的第二接触表面 驱动芯片和暴露于外部的焊盘电极的表面上的氧化物层,并且连接第一接触表面和第二接触表面。
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公开(公告)号:US20160211353A1
公开(公告)日:2016-07-21
申请号:US14966125
申请日:2015-12-11
Applicant: Samsung Display Co., Ltd.
Inventor: Jung Yun JO , Su Bin BAE , Ki Seong SEO
IPC: H01L29/66 , H01L29/45 , H01L29/786 , H01L29/24 , H01L21/475 , H01L21/02
CPC classification number: H01L29/66969 , H01L21/02554 , H01L21/02565 , H01L21/47635 , H01L29/41733 , H01L29/45 , H01L29/78606 , H01L29/7869
Abstract: There is provided a method of manufacturing an oxide thin film transistor (TFT). The method includes forming a gate electrode on a substrate, forming a gale insulating layer on the gate electrode, forming an oxide semiconductor layer including a channel layer on the gate insulating layer, forming a source electrode and a drain electrode separated from each other on the oxide semiconductor layer, first plasma processing the substrate on which the source electrode and the drain electrode are formed at a carbon (C) atmosphere, secondly plasma processing the substrate al a nitrogen oxide atmosphere, and sequentially forming a first protective layer and a second protective layer on the substrate.
Abstract translation: 提供一种制造氧化物薄膜晶体管(TFT)的方法。 该方法包括在衬底上形成栅电极,在栅电极上形成一绝热层,在栅极绝缘层上形成包括沟道层的氧化物半导体层,形成在其上分离的源极和漏电极 氧化半导体层,在碳(C)气氛下对其上形成有源电极和漏电极的基板进行等离子体处理,其次,在氮氧化物气氛下等离子体处理基板,依次形成第一保护层和第二保护层 层。
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公开(公告)号:US20240016012A1
公开(公告)日:2024-01-11
申请号:US18321621
申请日:2023-05-22
Applicant: Samsung Display Co., LTD.
Inventor: DAWOON JUNG , Yu-Gwang JEONG , Su Bin BAE , Tae Wook KANG
IPC: H10K59/131 , H10K59/12 , H10K59/124
CPC classification number: H10K59/131 , H10K59/1201 , H10K59/124
Abstract: A display device includes: a substrate; a semiconductor on the substrate; a first gate insulating layer on the semiconductor; a gate electrode on the first gate insulating layer, and overlapping with the semiconductor; a signal line spaced from the gate electrode; a sacrificial layer on the signal line, and including an amorphous silicon material; an interlayer insulating layer on the gate electrode and the sacrificial layer; a source electrode on the interlayer insulating layer, and connected to a first region of the semiconductor; a drain electrode on the interlayer insulating layer, and connected to a second region of the semiconductor; and a connecting member on the interlayer insulating layer, and connected to the signal line.
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公开(公告)号:US20220229322A1
公开(公告)日:2022-07-21
申请号:US17713715
申请日:2022-04-05
Applicant: Samsung Display Co., LTD.
Inventor: Seon-Il KIM , Sung Won CHO , Sang Gab KIM , Su Bin BAE , Yu-Gwang JEONG , Dae Won CHOI
IPC: G02F1/1368 , G02F1/1362 , H01L51/56 , H01L51/52 , H01L27/32
Abstract: A display device includes a thin film transistor on a base substrate and a signal wiring electrically connected to the thin film transistor. The signal wiring includes a main conductive layer including copper, and a capping layer including titanium the capping layer overlapping a portion of an upper surface of the main conductive layer. The signal wiring has a taper angle in a range of about 70° to about 90°. A thickness of the capping layer is in a range of about 100 Å to about 300 Å, and a thickness of the main conductive layer is in a range of about 1,000 Å to about 20,000 Å.
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公开(公告)号:US20210399177A1
公开(公告)日:2021-12-23
申请号:US17188783
申请日:2021-03-01
Applicant: Samsung Display Co., Ltd.
Inventor: Su Bin BAE , Yun Jong YEO , Jung Yun JO
Abstract: A display device includes a substrate; a first circuit part and a second circuit part on the substrate and spaced from each other in a first direction; and an emission part between the first circuit part and the second circuit part, the emission part being located between the first circuit part and the second circuit part in a direction parallel to the substrate, wherein the first circuit part includes a first electrode extending to the emission part, wherein the second circuit part includes a second electrode extending to the emission part, and wherein the emission part includes a light emitting element located between the first electrode and the second electrode.
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公开(公告)号:US20210384287A1
公开(公告)日:2021-12-09
申请号:US17445471
申请日:2021-08-19
Inventor: Sang Gab KIM , Hyun Min CHO , Tae Sung KIM , Yu-Gwang JEONG , Su Bin BAE , Jin Seock KIM , Sang Gyun KIM , Hyo Min KO , Kil Won CHO , Hansol LEE
IPC: H01L27/32
Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.
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公开(公告)号:US20190172819A1
公开(公告)日:2019-06-06
申请号:US16027960
申请日:2018-07-05
Applicant: Samsung Display Co., Ltd.
Inventor: Su Bin BAE , Yu Gwang JEONG , Shin Il CHOI , Joon Geol LEE , Sang Gab KIM
Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.
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公开(公告)号:US20170317104A1
公开(公告)日:2017-11-02
申请号:US15380596
申请日:2016-12-15
Applicant: Samsung Display Co., Ltd.
Inventor: Yu-Gwang JEONG , Hyun Min CHO , Su Bin BAE , Shin II CHOI , Sang Gab KIM
IPC: H01L27/12 , H01L21/311 , H01L27/32 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/1368 , G02F2201/123 , H01L21/31116 , H01L21/31144 , H01L27/1218 , H01L27/1288 , H01L27/3246 , H01L27/3248 , H01L27/3262 , H01L27/3276 , H01L29/41733
Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.
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