公开(公告)号：US10236442B2

公开(公告)日：2019-03-19

申请号：US15227334

申请日：2016-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehun Seo ,  Jong-Kyu Kim ,  Jung-Ik Oh ,  Inho Kim ,  Jongchul Park ,  Gwang-Hyun Baek ,  Hyun-woo Yang

IPC: H01L43/12 ,  H01L21/3213 ,  H01L21/02 ,  H01L27/22

Abstract: Provided herein are methods of fabricating a magnetic memory device including forming magnetic tunnel junction patterns on a substrate, forming an interlayered insulating layer on the substrate to cover the magnetic tunnel junction patterns, forming a conductive layer on the interlayered insulating layer, patterning the conductive layer to form interconnection patterns electrically connected to the magnetic tunnel junction patterns, and performing a cleaning process on the interconnection patterns. The cleaning process is performed using a gas mixture of a first gas and a second gas. The first gas contains a hydrogen element (H), and the second gas contains a source gas different from that of the first gas.

公开(公告)号：US09859492B2

公开(公告)日：2018-01-02

申请号：US15598605

申请日：2017-05-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongchul Park ,  Hyungjoon Kwon ,  Inho Kim ,  Jongsoon Park

IPC: H01L21/00 ,  H01L43/12 ,  H01L21/3213 ,  H01L27/22 ,  H01L27/108 ,  H01L43/08

CPC classification number: H01L43/12 ,  H01L21/32131 ,  H01L27/1087 ,  H01L27/222 ,  H01L43/08

Abstract: A patterning method includes forming an etch-target layer on a substrate, forming mask patterns on the etch-target layer, and etching the etch-target layer using the mask patterns as an etch mask to form patterns spaced apart from each other. The etching process of the etch-target layer includes irradiating the etch-target layer with an ion beam, whose incident energy ranges from 600 eV to 10 keV. A recess region is formed in the etch-target layer between the mask patterns, and the ion beam is incident onto a bottom surface of the recess region at a first angle with respect to a top surface of the substrate and is incident onto an inner side surface of the recess region at a second angle with respect to the inner side surface of the recess region. The first angle ranges from 50° to 90° and the second angle ranges from 0° to 40°.

公开(公告)号：US11233661B2

公开(公告)日：2022-01-25

申请号：US16800188

申请日：2020-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinha Hwang ,  Kyungsoo Kwag ,  Inho Kim ,  Dongsun Lee ,  Jungkyuen Lee ,  Jongtak Lee ,  Kyungim Jung

IPC: H04L9/32 ,  H04L9/08 ,  H04L9/06

Abstract: A device and a method for authenticating an application in an execution environment in a trust zone are provided. The method includes executing a client application (CA) in a normal world, receiving, in the normal world, a request for receiving a service of a trusted application (TA) of a secure world from the CA, acquiring, when the request is received in the normal world, source information of the CA loaded in a memory of the device, acquiring, in the normal world, first hash information from the source information, providing, to the secure world, the first hash information together with signature information and a sub certificate included in the CA, and authenticating the CA based on the sub certificate and a root certificate of the TA in the secure world.

公开(公告)号：US11107047B2

公开(公告)日：2021-08-31

申请号：US15054642

申请日：2016-02-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kibong Kim ,  Sang-Hee Kim ,  Inho Kim ,  Seon Sook Lee ,  Myung-Hwa Jun

IPC: G06Q20/02 ,  G06Q20/40 ,  G06Q20/38 ,  G06Q20/32 ,  G06Q20/36 ,  G06F3/048 ,  G06Q20/16 ,  G06Q40/02 ,  G06K9/00 ,  G06Q20/10 ,  G06Q20/22 ,  G06Q20/34 ,  H04W12/08 ,  G06F3/041 ,  H04W12/069

Abstract: A method of operating an electronic device capable of operating a plurality of execution environments including a first execution environment and a second execution environment is provided. The method includes generating a first authentication value, using a first application executed in the first execution environment, transmitting the first authentication value from the first application through the second execution environment to a second application executed in the first execution environment, transmitting, based on reception of the first authentication value, a second authentication value and a result of authentication of the user from the second application to the first application through the second execution environment, and performing, when the second authentication value corresponds to the first authentication value, payment based on the result of the authentication, using the first application.

公开(公告)号：US20200274718A1

公开(公告)日：2020-08-27

申请号：US16800188

申请日：2020-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinha Hwang ,  Kyungsoo Kwag ,  Inho Kim ,  Dongsun Lee ,  Jungkyuen Lee ,  Jongtak Lee ,  Kyungim Jung

IPC: H04L9/32 ,  H04L9/06 ,  H04L9/08

Abstract: A device and a method for authenticating an application in an execution environment in a trust zone are provided. The method includes executing a client application (CA) in a normal world, receiving, in the normal world, a request for receiving a service of a trusted application (TA) of a secure world from the CA, acquiring, when the request is received in the normal world, source information of the CA loaded in a memory of the device, acquiring, in the normal world, first hash information from the source information, providing, to the secure world, the first hash information together with signature information and a sub certificate included in the CA, and authenticating the CA based on the sub certificate and a root certificate of the TA in the secure world.

公开(公告)号：US10395979B2

公开(公告)日：2019-08-27

申请号：US16015809

申请日：2018-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inho Kim ,  Woohyun Lee ,  Oik Kwon ,  Sang-Kuk Kim ,  Yeonji Kim ,  Jongchul Park

IPC: H01L27/11573 ,  H01L21/768 ,  H01L27/22 ,  H01L43/12 ,  H01L43/02

Abstract: A semiconductor device includes a first lower insulating interlayer, a protection insulating layer, and a first upper insulating interlayer that are sequentially stacked on a substrate, and a conductive pattern penetrating the first upper insulating interlayer, the protection insulating layer; and the first lower insulating interlayer. The conductive pattern includes a line part extending in a direction parallel to an upper surface of the substrate and contact parts extending from the line part toward the substrate. The contact parts are separated from each other with an insulating pattern therebetween. The insulating pattern includes a portion of each of the first upper insulating interlayer, the protection insulating layer, and the first lower insulating interlayer. At least a portion of the insulating pattern has a stepped profile.

公开(公告)号：US11811008B2

公开(公告)日：2023-11-07

申请号：US17154632

申请日：2021-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Inho Kim ,  Yongmin Kwon ,  Sanghyun Kim ,  Jinwoo Park ,  Dongyeoul Lee ,  Dongju Lee ,  Sangbum Lee ,  Jonghyun Lee ,  Dahyun Choi

IPC: H01L33/62 ,  H01L27/15 ,  H01L33/22 ,  H01L33/38 ,  H01L33/46 ,  H01L33/50 ,  H01L33/58 ,  H01L33/64 ,  F21K9/23 ,  F21K9/27

CPC classification number: H01L33/62 ,  H01L27/156 ,  H01L33/22 ,  H01L33/382 ,  H01L33/46 ,  H01L33/50 ,  H01L33/58 ,  H01L33/642 ,  F21K9/23 ,  F21K9/27 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0041 ,  H01L2933/0066

Abstract: A light source module includes a light-emitting cell, a wiring structure provided on the light-emitting cell and connected to the light-emitting cell, a support structure that is apart from the light-emitting cell with the wiring structure therebetween in a vertical direction, a printed circuit board (PCB) that is apart from the wiring structure with the support substrate therebetween in the vertical direction and overlapping the light-emitting cell in the vertical direction, and at least one insulating film that is apart from the wiring structure in the vertical direction and covering at least one of a first surface of the support substrate, which faces the wiring structure, and a second surface of the support substrate, which faces the PCB.

公开(公告)号：US10777560B2

公开(公告)日：2020-09-15

申请号：US16833914

申请日：2020-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

公开(公告)号：US10748906B2

公开(公告)日：2020-08-18

申请号：US16110658

申请日：2018-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

公开(公告)号：US20190189502A1

公开(公告)日：2019-06-20

申请号：US16015809

申请日：2018-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inho Kim ,  Woohyun LEE ,  Oik KWON ,  Sang-Kuk KIM ,  Yeonji KIM ,  Jongchul PARK

IPC: H01L21/768 ,  H01L27/22 ,  H01L43/12

CPC classification number: H01L21/76816 ,  H01L21/76804 ,  H01L27/11573 ,  H01L27/224 ,  H01L27/228 ,  H01L43/02 ,  H01L43/12

Abstract: A semiconductor device includes a first lower insulating interlayer, a protection insulating layer, and a first upper insulating interlayer that are sequentially stacked on a substrate, and a conductive pattern penetrating the first upper insulating interlayer, the protection insulating layer; and the first lower insulating interlayer. The conductive pattern includes a line part extending in a direction parallel to an upper surface of the substrate and contact parts extending from the line part toward the substrate. The contact parts are separated from each other with an insulating pattern therebetween. The insulating pattern includes a portion of each of the first upper insulating interlayer, the protection insulating layer, and the first lower insulating interlayer. At least a portion of the insulating pattern has a stepped profile.