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公开(公告)号:US11496342B1
公开(公告)日:2022-11-08
申请号:US17319850
申请日:2021-05-13
Applicant: Texas Instruments Incorporated
Inventor: Hasibur Rahman , Yang Xu , Ariel Dario Moctezuma
Abstract: An example apparatus includes: a receiver operable to receive a modulated input signal at a receiver input and output a demodulated signal at a receiver output, the receiver comprising a switch having a first current terminal and a first control terminal, the first current terminal coupled to the receiver output. The example apparatus includes a capacitor having a first terminal and a second terminal, the second terminal coupled to the first control terminal and the first terminal coupled to the receiver input. The example apparatus includes a resistor having a third terminal and a fourth terminal, the fourth terminal coupled to the first control terminal. The example apparatus includes a voltage offset source having an input and an output, the output coupled to the third terminal. The example apparatus includes a current source coupled to the first current terminal.
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公开(公告)号:US10821922B2
公开(公告)日:2020-11-03
申请号:US15212535
申请日:2016-07-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: George Konnail , Angelo Pereira , Hasibur Rahman , Xiaochun Zhao , Artur Juliusz Lewinski
IPC: G06F1/32 , B60R16/03 , G06F1/3203 , G06F1/3287
Abstract: One example includes a power control system. The power control system includes an activation controller that is powered via a first power voltage generated via a first power supply and is configured to provide an enable signal. The activation controller can assert the enable signal in response to an input activation signal to control activation of a second power supply. The second power supply can generate a second power voltage in response to the enable signal being asserted. The second power voltage can be provided to regulate power associated with ancillary electronic circuitry. The system also includes a deactivation controller that is powered via the second power voltage and is configured to generate a disable signal to de-assert the enable signal in response to one of a plurality of predetermined deactivation conditions.
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公开(公告)号:US11476761B2
公开(公告)日:2022-10-18
申请号:US17014863
申请日:2020-09-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Gary Franklin Chard , Ariel Dario Moctezuma , Hasibur Rahman , Alex Kwasi Nyavor Titriku , Srinath Hosur
Abstract: An inductor has first and second terminals. A first switch is coupled between the first terminal and a voltage supply terminal. A second switch is coupled between the first terminal and a negative output supply terminal. A third switch is coupled between the second terminal and a positive output supply terminal. A fourth switch is coupled between the second terminal and a ground terminal. A controller is coupled to the first, second, third and fourth switches. The controller is configured to provide: an inductor charge mode; a positive boost mode; a negative boost mode; a first rest state in which the controller closes the first switch and opens the second, third and fourth switches; and a second rest state in which the controller closes the fourth switch and opens the first, second and third switches.
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公开(公告)号:US11444587B2
公开(公告)日:2022-09-13
申请号:US17124785
申请日:2020-12-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Yang Xu , William Bright , Hasibur Rahman
Abstract: A circuit having an input and an output, the circuit comprising: a first amplifier having a first input, a second input and an output coupled to the output of the circuit; a first capacitor having a first terminal coupled to the first input of the first amplifier and a second terminal coupled to the output of the first amplifier; a first resistor having a first terminal coupled to the first input of the first amplifier and a second terminal; a buffer having an output coupled to the second terminal of the first resistor and an input; a second resistor having a first terminal coupled to the output of the first amplifier and a second terminal coupled to the input of the buffer; a second capacitor coupled between the input of the buffer and ground; and a third resistor coupled between the input of the buffer and the input of the circuit.
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公开(公告)号:US20140131781A1
公开(公告)日:2014-05-15
申请号:US14158948
申请日:2014-01-20
Applicant: Texas Instruments Incorporated
Inventor: Scott Robert Summerfelt , Hasibur Rahman , John Paul Campbell
IPC: H01L23/528 , H01L27/06
CPC classification number: H01L23/528 , H01L21/76816 , H01L21/76838 , H01L21/76843 , H01L23/485 , H01L23/5226 , H01L23/5256 , H01L23/5283 , H01L27/0629 , H01L2924/0002 , H01L2924/00
Abstract: An integrated circuit contains lower components in the substrate, a PMD layer, upper components over the PMD layer, lower contacts in the PMD layer connecting some upper components to some lower components, an ILD layer over the upper components, metal interconnect lines over the ILD layer, and upper contacts connecting some upper components to some metal interconnect lines, and also includes annular stacked contacts of lower annular contacts aligned with upper annular contacts. The lower contacts and upper contacts each have a metal liner and a contact metal on the liner. The lower annular contacts have at least one ring of liner metal and contact metal surrounding a pillar of PMD material, and the upper contacts have at least one ring of liner metal and contact metal surrounding a pillar of ILD material. The annular stacked contacts connect the metal interconnects to the lower components.
Abstract translation: 集成电路在衬底中包含较低的组件,PMD层,PMD层上的上部组件,PMD层中的下部触点将一些上部组件连接到某些较低组件,上部组件上的ILD层,ILD上的金属互连线 层和上部触点,其将一些上部部件连接到某些金属互连线,并且还包括与上部环形触点对准的下部环形触点的环形堆叠触点。 下触点和上接触件都具有衬垫上的金属衬垫和接触金属。 下环形触头具有至少一个衬垫金属环和围绕PMD材料柱的接触金属,并且上触点具有至少一个衬垫金属环和围绕ILD材料柱的接触金属。 环形堆叠的触点将金属互连件连接到下部组件。
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