公开(公告)号：US09710411B2

公开(公告)日：2017-07-18

申请号：US13963264

申请日：2013-08-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Yonghui Tang ,  Suzanne Mary Vining ,  Hao Liu

IPC: G06F13/42 ,  G06F13/38

CPC classification number: G06F13/385

Abstract: A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The signal conditioner can also include a re-driver configured to inject current into at least one of a rising edge and a falling edge of the data signal on the bi-directional serial bus in response to the detection of the predetermined protocol level mode.

公开(公告)号：US20250023756A1

公开(公告)日：2025-01-16

申请号：US18525376

申请日：2023-11-30

Applicant: Texas Instruments Incorporated

Inventor： Win Naing Maung ,  James Skidmore ,  Roy Wojciechowski

IPC: H04L12/407

Abstract: Methods, apparatus, systems, and articles of manufacture are described to facilitate determination of leader and follower for a shared interface. An example first physical layer includes interface circuitry configured to transmit a first signal to a second physical layer; comparator circuitry configured to compare a second signal from the second physical layer to the first signal; and configuration circuitry configured to facilitate operation as a leader or a follower based on the comparison.

公开(公告)号：US20250021704A1

公开(公告)日：2025-01-16

申请号：US18523590

申请日：2023-11-29

Applicant: Texas Instruments Incorporated

Inventor： Win Naing Maung ,  Srijan Rastogi ,  Bharath Singareddy

IPC: G06F21/85 ,  G06F13/42

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to prevent a false disconnection in universal serial bus devices. An example apparatus includes a comparator including a first input terminal, a second input terminal, and an output terminal, the first input terminal coupled to a first connectional terminal, the second input terminal coupled to a second connection terminal; filter circuitry including an input terminal and an output terminal, the input terminal coupled to the output terminal of the comparator; a switch including a control terminal, a first current terminal, and a second current terminal, the control terminal coupled to the output terminal of the filter circuitry; and a current source including a first terminal and a second terminal, the first terminal coupled to at least one of the first connection terminal or the second connection terminal, the second terminal coupled to the first current terminal of the switch.

公开(公告)号：US20220100689A1

公开(公告)日：2022-03-31

申请号：US17463697

申请日：2021-09-01

Applicant: Texas Instruments Incorporated

Inventor： Suzanne Mary Vining ,  Win Naing Maung

IPC: G06F13/40 ,  G06F13/42

Abstract: An embedded USB2 (eUSB2) repeater includes an eUSB2 port having first and second terminals. The eUSB2 port facilitates two-way communication between the repeater and an application processor unit (APU) according to voltage level specifications for eUSB2. The repeater includes a USB port having first and second terminals. The USB port facilitates two-way communication between the repeater and a Universal Asynchronous Receiver Transmitter (UART) according to voltage level specifications for US. The repeater includes a multiplexer having an input coupled to receive a control signal. The multiplexer selectively establishes connections between the first and second terminals of the eUSB2 port and the first and second terminals of the USB port.

公开(公告)号：US11068435B2

公开(公告)日：2021-07-20

申请号：US16751411

申请日：2020-01-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Suzanne Mary Vining ,  Yonghui Tang ,  Douglas Edward Wente ,  Huanzhang Huang

IPC: G06F13/42

Abstract: A serial bus signal conditioner circuit includes receiver circuitry, a mode identification circuit, and an edge-rate booster circuit. The receiver circuitry is configured to receive signals transmitted on a serial bus. The mode identification circuit is coupled to the receiver circuitry, and is configured to identify initiation of or return to high-speed signaling on the serial bus based on sequences of the signals transmitted on the serial bus. The edge-rate booster circuit is coupled to the mode identification circuit, and is configured to identify edges of a differential signal transmitted on the serial bus, and to supply a differential current to the serial bus based on identification of an edge of the differential signal.

公开(公告)号：US11068433B2

公开(公告)日：2021-07-20

申请号：US16433661

申请日：2019-06-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Suzanne Mary Vining

IPC: G06F13/42 ,  G06F1/3206 ,  G06F13/38

Abstract: A serial bus repeater includes a port circuit and a low power state detection circuit. The port circuit is configured to communicate via a serial bus. The low power state detection circuit includes a power state transaction identification circuit and a bus state identification circuit. The power state transaction identification circuit is configured to identify a power state transaction on the serial bus. The power state transaction is indicative of entering a reduced power state. The bus state identification circuit is configured to identify a value of termination resistance on the serial bus that is indicative of entering the reduced power state.

公开(公告)号：US11003605B2

公开(公告)日：2021-05-11

申请号：US16684711

申请日：2019-11-15

Applicant: Texas Instruments Incorporated

Inventor： Win Naing Maung ,  Charles Michael Campbell

IPC: G06F13/20 ,  H04L5/16 ,  H03K19/0175

Abstract: An input/output (I/O) level shifter for a subscriber identification module (SIM) interface includes a controller configured to apply a first enable signal to turn ON a first transmitter when the direction of packet flow is from an interface device to a SIM card, and is configured to apply a second enable signal to turn ON a second transmitter when the direction of packet flow is from the SIM card to the interface device. The controller is configured to not apply the first and the second enable signals concurrently. The controller selectively controls the ON/OFF period of the first and the second transmitter to maintain half-duplex communication on the interface I/O line and the SIM I/O line to prevent undesired positive data feedback.

公开(公告)号：US10762016B2

公开(公告)日：2020-09-01

申请号：US16404494

申请日：2019-05-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Douglas Edward Wente ,  Mustafa Ulvi Erdogan ,  Huanzhang Huang ,  Saurabh Goyal ,  Bhupendra Sharma

IPC: G06F13/38 ,  G06F13/42 ,  H04B3/36

Abstract: Aspects of the disclosure provide for a circuit including a squelch detector having a first input coupled to a first node and configured to receive a positive component of a differential signal with a floating center tap, a second input coupled to a second node and configured to receive a negative component of the differential signal, and an output coupled to a logic circuit, a first resistor coupled between the first node and a third node, a second resistor coupled between the third node and the second node, a third resistor coupled between the first node and a fourth node, a fourth resistor coupled between the fourth node and the second node, a capacitor coupled between the fourth node and a ground terminal, a comparator having a first input coupled to the third node, a second input coupled to a fifth node, and an output coupled to the logic circuit.

公开(公告)号：US20200264989A1

公开(公告)日：2020-08-20

申请号：US16661018

申请日：2019-10-23

Applicant: Texas Instruments Incorporated

Inventor： Douglas Edward Wente ,  Suzanne Mary Vining ,  Win Naing Maung ,  Julie Marie Nirchi

IPC: G06F13/10 ,  G06F13/42

Abstract: A method of operating an embedded USB2 (eUSB2) repeater includes receiving a downstream packet at a USB2 port and transitioning a USB transmitter from an idle state to a standby state responsive to receiving the downstream packet. The method further includes transitioning the USB transmitter from the standby state to an active state if an upstream packet is received at an eUSB2 port within a first time period of receiving the downstream packet and transmitting the upstream packet. The method also includes transitioning the USB transmitter from the active state to the standby state after transmission of the upstream packet. The method also includes transitioning the USB transmitter from the standby state to the idle state if more upstream packets are not received at the eUSB2 port within a second time period.

公开(公告)号：US11791863B2

公开(公告)日：2023-10-17

申请号：US17458624

申请日：2021-08-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Suzanne Mary Vining ,  Gary Chard ,  Win Naing Maung ,  Mark Alan McAdams

IPC: H04B3/54 ,  G06F13/42

CPC classification number: H04B3/54 ,  G06F13/4282 ,  G06F2213/0042

Abstract: At least some aspects of the present disclosure provide for a method. In some examples, the method includes receiving 2-line data in an embedded Universal Serial Bus (eUSB) format. The method further includes encoding the 2-line data into a single signal. The single signal comprises a first symbol corresponding to a first state change of the 2-line data and a second symbol corresponding to a second state change of the 2-line data.