-
公开(公告)号：US20220302908A1
公开(公告)日：2022-09-22
申请号：US17832280
申请日：2022-06-03
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Junmin Jiang
Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.
-
Patent Agency Ranking
公开(公告)号：US20210399638A1
公开(公告)日：2021-12-23
申请号：US17348122
申请日：2021-06-15
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Yogesh Ramadass , Jessica Danielle Boles
Abstract: A power converter including a piezoelectric resonator. The power converter includes a first transistor coupled between an input terminal and a first plate of the piezoelectric resonator, and a second transistor coupled between the first plate of the piezoelectric resonator and an output terminal. A load may be coupled at the output terminal. Controller circuitry has inputs coupled to the input node, the output node, and to the first plate of the piezoelectric resonator, and outputs coupled to control terminals of the first and second transistors. The controller circuitry operates to turn on the first transistor responsive to a comparison of voltages at the first plate and the input terminal, turn on the second transistor responsive to a comparison of voltages at the first plate and the output terminal, and turn off one of the first and second transistors responsive to an output level at the output terminal.
-
公开(公告)号：US10886881B2
公开(公告)日：2021-01-05
申请号：US16360703
申请日：2019-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Yinglai Xia , Shailendra Kumar Baranwal , Junmin Jiang , Yogesh Kumar Ramadass
Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.
-
公开(公告)号：US20240356511A1
公开(公告)日：2024-10-24
申请号：US18761382
申请日：2024-07-02
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Yogesh Ramadass
CPC classification number: H03G3/34 , H03F3/217 , H03F2200/03
Abstract: In one example, an apparatus comprises a control circuit, a first power stage, and a second power stage. The control circuit has an input, first control outputs, and second control outputs, the control circuit including a modulated signal generator coupled between the input and the first control outputs and an amplifier coupled between the input and the second control outputs. The first power stage has first control inputs and a first power stage output, the first control inputs coupled to the first control outputs. And the second power stage has second control inputs and a second power stage output, the second control inputs coupled to the second control outputs.
-
公开(公告)号：US11716023B2
公开(公告)日：2023-08-01
申请号：US17348122
申请日：2021-06-15
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Yogesh Ramadass , Jessica Danielle Boles
Abstract: A power converter including a piezoelectric resonator. The power converter includes a first transistor coupled between an input terminal and a first plate of the piezoelectric resonator, and a second transistor coupled between the first plate of the piezoelectric resonator and an output terminal. A load may be coupled at the output terminal. Controller circuitry has inputs coupled to the input node, the output node, and to the first plate of the piezoelectric resonator, and outputs coupled to control terminals of the first and second transistors. The controller circuitry operates to turn on the first transistor responsive to a comparison of voltages at the first plate and the input terminal, turn on the second transistor responsive to a comparison of voltages at the first plate and the output terminal, and turn off one of the first and second transistors responsive to an output level at the output terminal.
-
公开(公告)号：US10965279B2
公开(公告)日：2021-03-30
申请号：US16360927
申请日：2019-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Yogesh Kumar Ramadass , Bhushan Talele , Shailendra Kumar Baranwal , Yinglai Xia , Junmin Jiang
Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.
-
-
-
-
-
Search Results
16
records
(took 0.027 seconds)
