公开(公告)号：US09627331B1

公开(公告)日：2017-04-18

申请号：US14985127

申请日：2015-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng Chien ,  Chih-Chien Ho ,  Steven Su

IPC: H01L23/00 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49541 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49551 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48138 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/17747 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A leadframe includes a plurality of interconnected support members. A pair of die pads is connected to the support members and configured to receive a pair of dies electrically connected by at least one wire. A support bracket extends between the die pads and includes a surface for maintaining the at least one wire at a predetermined distance from the die pads during overmolding of the leadframe.

公开(公告)号：US12040197B2

公开(公告)日：2024-07-16

申请号：US17401057

申请日：2021-08-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng Chien ,  Hung-Yu Chou ,  Fu-Kang Lee ,  Steven Alfred Kummerl

IPC: H01L23/62 ,  H01L21/48 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L21/4825 ,  H01L21/4842 ,  H01L23/49517 ,  H01L23/49548 ,  H01L23/62 ,  H01L24/00 ,  H01L23/49551 ,  H01L23/49562

Abstract: An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

公开(公告)号：US11735506B2

公开(公告)日：2023-08-22

申请号：US16206640

申请日：2018-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu Chou ,  Bo-Hsun Pan ,  Yuh-Harng Chien ,  Fu-Hua Yu ,  Steven Alfred Kummerl ,  Jie Chen ,  Rajen M. Murugan

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/49568 ,  H01L21/4821 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49503

Abstract: In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to the first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

公开(公告)号：US20220336331A1

公开(公告)日：2022-10-20

申请号：US17229955

申请日：2021-04-14

Applicant: Texas Instruments Incorporated

Inventor： Chih-Chien Ho ,  Bo-Hsun Pan ,  Yuh-Harng Chien

IPC: H01L23/495 ,  H01L21/50

Abstract: A packaged electronic device has a package structure, first leads, second leads and a tie bar. The package structure has a first side, a second side, a third side, a fourth side, a fifth side and a sixth side, the second side spaced from the first side along a first direction, the fourth side spaced from the third side along an orthogonal second direction, and the sixth side spaced from the fifth side along an orthogonal third direction. The first leads extend outward in a first plane of the second and third directions from respective portions of the third side, the second leads extend outward in the first plane from respective portions of the fourth side, and the tie bar is exposed along the fifth side in a second plane of the second and third directions, the second plane between the first plane and the first side.

公开(公告)号：US20210305139A1

公开(公告)日：2021-09-30

申请号：US16831503

申请日：2020-03-26

Applicant: Texas Instruments Incorporated

Inventor： Yuh-Harng Chien ,  Chang-Yen Ko ,  Chih-Chien Ho

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/16 ,  H01L25/00

Abstract: In a described example, an apparatus includes a package substrate with a split die pad having a slot between a die mount portion and a wire bonding portion; a first end of the wire bonding portion coupled to the die mount portion at one end of the slot; a second end of the wire bonding portion coupled to a first lead on the package substrate. At least one semiconductor die is mounted on the die mount portion; a first end of a first wire bond is bonded to a first bond pad on the at least one semiconductor die; a second end of the first wire bond is bonded to the wire bonding portion; and mold compound covers the at least one semiconductor die, the die mount portion, the wire bonding portion, and fills the slot.

公开(公告)号：US10529654B2

公开(公告)日：2020-01-07

申请号：US16143148

申请日：2018-09-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng Chien ,  Chih-Chien Ho ,  Steven Su

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L21/56

Abstract: A leadframe includes a plurality of interconnected support members. A pair of die pads is connected to the support members and configured to receive a pair of dies electrically connected by at least one wire. A support bracket extends between the die pads and includes a surface for maintaining the at least one wire at a predetermined distance from the die pads during overmolding of the leadframe.

公开(公告)号：US10340152B1

公开(公告)日：2019-07-02

申请号：US15857988

申请日：2017-12-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng Chien ,  Hung-Yu Chou ,  Fu-Kang Lee ,  Steven Alfred Kummerl

IPC: H01L23/495 ,  H01L21/48

CPC classification number: H01L21/4825 ,  H01L21/4842 ,  H01L23/49517 ,  H01L23/49548

Abstract: An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

公开(公告)号：US11742265B2

公开(公告)日：2023-08-29

申请号：US16660713

申请日：2019-10-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu Chou ,  Chi-Chen Chien ,  Yuh-Harng Chien ,  Steven Alfred Kummerl ,  Bo-Hsun Pan ,  Fu-Hua Yu

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/522 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49568 ,  H01L21/4839 ,  H01L21/565 ,  H01L23/3157 ,  H01L23/49548 ,  H01L23/49861 ,  H01L23/5228

Abstract: In some examples, a semiconductor package comprises a lead frame. The lead frame includes a first row of leads; a first pad coupled to the first row of leads; a second row of leads; and a second pad coupled to the second row of leads, the first and second pads separated by a gap. The semiconductor package includes a heat-generating device coupled to the first and second pads and exposed to an exterior of the semiconductor package.

公开(公告)号：US11081429B2

公开(公告)日：2021-08-03

申请号：US16600615

申请日：2019-10-14

Applicant: Texas Instruments Incorporated

Inventor： Jason Chien ,  J K Ho ,  Yuh-Harng Chien

IPC: H01L23/495 ,  H01L21/00 ,  H01L23/48 ,  H01L23/498 ,  H01L23/00

Abstract: A packaged semiconductor device includes a leadframe including a finger pad(s) that is integrated, and spans a finger pad area including a width narrower than its length. A first portion of the finger pad area provides a die support area. A second portion of the finger pad area provides a wire bond area including first and second wire bond pads on a first and second side of the die support area. One of the wire bond pads further includes a lead terminal integrally connected. The IC die has a top side with bond pads and a back side having a non-electrically conductive die attach material attached to the die support area. Bond wires extend from the bond pads to the first and second wire bond pads. A mold compound encapsulates the packaged semiconductor device leaving exposed at least the lead terminal on a bottom side of the packaged semiconductor device.

公开(公告)号：US11081428B2

公开(公告)日：2021-08-03

申请号：US16537535

申请日：2019-08-10

Applicant: Texas Instruments Incorporated

Inventor： Stanley Chou ,  Yuh-Harng Chien ,  Steven Alfred Kummerl ,  Bo-Hsun Pan ,  Pi-Chiang Huang ,  Frank Yu ,  Chih-Chien Ho

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/492

Abstract: An electronic device includes a package structure with opposite first and second sides spaced apart along a first direction, opposite third and fourth sides spaced apart along a second direction, opposite fifth and sixth sides spaced apart along a third direction, the first, second, and third directions being orthogonal to one another. A set of first leads extend outward from the first side along the first direction, a set of second leads extend outward from the second side along the first direction, and a thermal pad includes a first portion that extends along a portion of the fifth side, and a second portion that extends along a portion of the third side to facilitate cooling and visual solder inspection when soldered to a host printed circuit board.