公开(公告)号：US20170309708A1

公开(公告)日：2017-10-26

申请号：US15169753

申请日：2016-06-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Ming-Chih Chen

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78

CPC classification number: H01L29/78 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/7835 ,  H01L29/7843 ,  H01L29/7848

Abstract: A field effect transistor is provided in the present invention with an active area including a source region, a drain region, and a channel region. The width of the channel region is larger than the width of the source/drain regions, and at least one of the source region and the drain region is comb-shaped.

公开(公告)号：US20250166997A1

公开(公告)日：2025-05-22

申请号：US18537814

申请日：2023-12-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ping Wang ,  Chuan-Lan Lin ,  Chu-Fu Lin ,  Teng-Chuan Hu ,  Kun-Ju Li

IPC: H01L21/304 ,  H01L21/3065 ,  H01L23/00 ,  H01L25/065

Abstract: The invention provide an edge structure of a semiconductor wafer, which comprise a first substrate, an edge region and a device region are defined on that first substrate, a first material layer covers a first surface and a side surface of the edge region, and a second material layer covers the first material layer, the cross-sectional structure of the second material layer gradually decreases from the device region to the edge region.

公开(公告)号：US20250151320A1

公开(公告)日：2025-05-08

申请号：US18531668

申请日：2023-12-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi Chuen Eng ,  Tzu-Feng Chang ,  Teng-Chuan Hu ,  Yi-Wen Chen ,  Yu-Hsiang Lin

IPC: H01L29/78

Abstract: A FinFET LDMOS device includes a semiconductor substrate; juxtaposed first well and second well in the semiconductor substrate; semiconductor fins extending on the semiconductor substrate along a first direction, the semiconductor fins including a first fin portion in the first well and a second fin portion in the second well; an extra semiconductor body adjoining the first fin portion and the second fin portion and extending along a second direction; a source region on the first fin portion; a drain region on the second fin portion; a gate covering the semiconductor fin and extending along the second direction, wherein the gate partially overlaps the first fin portion and partially overlaps the second fin portion, and the extra semiconductor body is covered by the gate; and a single-diffusion break structure embedded in the second fin portion and between the gate and drain region.

公开(公告)号：US11646343B2

公开(公告)日：2023-05-09

申请号：US17136075

申请日：2020-12-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Teng-Chuan Hu ,  Chu-Fu Lin ,  Chun-Hung Chen

IPC: H01L49/02

CPC classification number: H01L28/91

Abstract: A capacitor structure comprises a substrate having a first side and a second side opposite to the first side; a plurality of first trenches formed on the first side of the substrate; a plurality of second trenches formed on the second side of the substrate; a first capacitor extending along the first side and into the first trenches; and a second capacitor extending along the second side and into the second trenches.

公开(公告)号：US10192808B1

公开(公告)日：2019-01-29

申请号：US15642349

申请日：2017-07-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Teng-Chuan Hu ,  Chun-Hung Chen ,  Chu-Fu Lin ,  Chun-Ting Yeh ,  Chung-Hsing Kuo ,  Ming-Tse Lin

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/48 ,  H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  H01L21/321

Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.

公开(公告)号：US20180012971A1

公开(公告)日：2018-01-11

申请号：US15677035

申请日：2017-08-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

公开(公告)号：US20170069730A1

公开(公告)日：2017-03-09

申请号：US14877926

申请日：2015-10-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： YI CHUEN ENG ,  Teng-Chuan Hu ,  I-Chang Wang ,  Wei-Chih Chen ,  Hsiu-Kuan Hsu

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/42356 ,  H01L29/0649 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

Abstract: A fin-shaped field effect transistor includes a substrate and a gate. The substrate includes an active area, where the active area includes a fin structure having at least an extension part protruding from the fin structure. The gate is disposed over the fin structure and directly on the extension part. The present invention also provides a planar field effect transistor including a substrate and a gate. The substrate includes an active area, where the active area includes a frame area and a penetrating area penetrating through the frame area. The gate is disposed over the active area, where the gate is directly disposed on the penetrating area, and the frame area at least at a side of the gate constitutes a source/drain surrounding an isolation island.

Abstract translation: 鳍状场效应晶体管包括衬底和栅极。 基板包括有源区域，其中有源区域包括具有至少一个从翅片结构突出的延伸部分的翅片结构。 门设置在翅片结构上并直接在延伸部分上。 本发明还提供一种包括衬底和栅极的平面场效应晶体管。 基板包括有源区域，其中有源区域包括框架区域和贯穿框架区域的穿透区域。 栅极设置在有源区域上，其中栅极直接设置在穿透区域上，并且至少在栅极侧的框架区域构成围绕隔离岛的源极/漏极。