DIGITAL SIGNAL PROCESSOR AND SIGNAL PROCESSING SYSTEM

    公开(公告)号:JPH11316678A

    公开(公告)日:1999-11-16

    申请号:JP12218898

    申请日:1998-05-01

    Applicant: YAMAHA CORP

    Abstract: PROBLEM TO BE SOLVED: To improve both the rate of digital signal processing and the use efficiency of a memory. SOLUTION: This system is composed of an external memory 1 and a DSP 2. The external memory 1 stores a basic instruction and data. The DSP 2 is provided with an ALU 12 for generating the address of the external memory 1, a bus control unit 13 for identifying the basic instruction and the data read out of the external memory 1 by the address generated by this ALU 12, an arithmetic means 17-19 for performing the arithmetic processing of data and an internal memory 23 internally storing a high-speed instruction for controlling the operation of these parts. The internal memory 23 is activated by the basic instruction from the outside and continuously reads out the high-speed instruction.

    TRACKING DEVICE FOR DISK RECORDING AND REPRODUCING DEVICE

    公开(公告)号:JPH08235599A

    公开(公告)日:1996-09-13

    申请号:JP34969595

    申请日:1995-12-21

    Applicant: YAMAHA CORP

    Abstract: PURPOSE: To stably and exactly stop a pickup at a target track. CONSTITUTION: A direction discriminator 1 outputs a forward pulse FWD and a backward pulse BWD based on the phase relationship between a pit position signal HFD and a tracking error signal TER. A track counter 2 up-counts and down-counts the pulses FWD and BWD. A reference pulse generator 3 outputs a reference pulse which decides the moving speed of the pickup. A phase comparator 4 outputs an accelerating pulse KP+ and a decelerating pulse KP- from the signal TER in a track count mode so as to synchronize with the reference pulse and outputs a brake pulse so that the signals HFD and TER show an on-track in the brake mode in which a count value indicates a target track.

    DIGITAL PLL CIRCUIT
    13.
    发明专利

    公开(公告)号:JPH0472816A

    公开(公告)日:1992-03-06

    申请号:JP18447690

    申请日:1990-07-12

    Applicant: YAMAHA CORP

    Abstract: PURPOSE:To improve the resolution by comparing a high-order data of an output data of a loop filter with a count of a counter and a low-order data of the output data of the loop filter with a timing pulse outputted from a ring oscillator. CONSTITUTION:Every time an input pulse comes, a phase error detection means 21 latches a value resulting from encoding plural timing pulses and a count of a counter and outputs the latched data to a loop filter 19 as a phase error data. An undesired frequency component is eliminated from the phase error data by the loop filter 19. Moreover, comparator means 12-14 compare a high- order data of an output data of the loop filter 19 with the count and compare a low-order data of the output data of the loop filter 19 with the timing pulse. When they are coincident with each other respectively, a coincident pulse is outputted and the coincident pulse is outputted as an output pulse in following to the input pulse. Thus, the resolution is improved and the processing of a high frequency pulse signal is attained.

    Class d amplifier circuit
    14.
    发明专利
    Class d amplifier circuit 有权
    D类放大器电路

    公开(公告)号:JP2011077737A

    公开(公告)日:2011-04-14

    申请号:JP2009225752

    申请日:2009-09-30

    Abstract: PROBLEM TO BE SOLVED: To invert the output current of a class D amplifier circuit by a simple configuration.
    SOLUTION: In the class D amplifier circuit 100, a first state and a second state are switched corresponding to an input signal AIN. In the first state, after a current from a first ND1 to a second ND2 flows to a coil L in a state where the coil L and a load 30 are electrically cut off, the coil L and the load 30 are electrically connected, and the current from the first node ND1 to the second node ND2 flows to the load 30 and charged to a capacitive element C. In the second state, after a current from the second node ND2 to the first node ND1 flows to the coil L in a state where the coil L and the load 30 are electrically cut off, the coil L and the load 30 are electrically connected, and the current from the second node ND2 to the first node ND1 flows to the load 30 and charged to the capacitive element C.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:通过简单的配置来反转D类放大器电路的输出电流。 解决方案:在D类放大器电路100中,对应于输入信号AIN切换第一状态和第二状态。 在第一状态下,在线圈L和负载30断电的状态下,在从第一ND1到第二ND2的电流流到线圈L之后,线圈L和负载30电连接, 从第一节点ND1到第二节点ND2的电流流到负载30并充电到电容元件C.在第二状态下,在从第二节点ND2到第一节点ND1的电流在一个状态下流到线圈L 其中线圈L和负载30被电断开,线圈L和负载30电连接,并且从第二节点ND2到第一节点ND1的电流流到负载30并充电到电容元件C. 版权所有(C)2011,JPO&INPIT

    Signal processor
    15.
    发明专利
    Signal processor 审中-公开
    信号处理器

    公开(公告)号:JP2011029787A

    公开(公告)日:2011-02-10

    申请号:JP2009171431

    申请日:2009-07-22

    Abstract: PROBLEM TO BE SOLVED: To reduce the folding noise of a higher harmonic generated in nonlinear processing. SOLUTION: A signal processor 100 includes: an over-sampling circuit 20 for performing the over-sampling processing of PCM data Din sampled by a sampling frequency Fs; an interpolation circuit 30 for raising a sampling frequency to 128 Fs by interpolation processing; a slice circuit 40 for performing the slice processing of an output signal of the interpolation circuit 30; a noise shaper 50; and a PWM circuit 60. COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:减少在非线性处理中产生的高次谐波的折叠噪声。 解决方案:信号处理器100包括:用于执行由采样频率Fs采样的PCM数据Din的过采样处理的过采样电路20; 用于通过内插处理将采样频率提高到128Fs的内插电路30; 用于对插值电路30的输出信号进行片段处理的片电路40; 噪音整形器50; 和PWM电路60.版权所有(C)2011,JPO&INPIT

    Amplifier circuit
    16.
    发明专利
    Amplifier circuit 审中-公开
    放大器电路

    公开(公告)号:JP2010233059A

    公开(公告)日:2010-10-14

    申请号:JP2009079642

    申请日:2009-03-27

    Abstract: PROBLEM TO BE SOLVED: To provide an amplifier circuit that maintains an output power as much as possible while preventing clipping of output signals.
    SOLUTION: The amplifier circuit includes: an amplification section (50) for amplifying a first signal to generate a second signal (Vo), and a characteristic correction section (20) for generating the first signal by performing or without performing frequency characteristic processing to all or a part of input signals (Vg) based on a state variable (VxTyp) that varies according to the state of the amplification section. In the figure, the characteristic correction section generates Vx=Vg, Vx=Vg', or Vx=G1×Vg'+ G2×Vg(0

    Abstract translation: 要解决的问题:提供尽可能保持输出功率同时防止输出信号削波的放大器电路。 解决方案:放大器电路包括:用于放大第一信号以产生第二信号(Vo)的放大部分(50),以及用于通过执行或不执行频率特性来产生第一信号的特性校正部分(20) 基于根据放大部分的状态而变化的状态变量(VxTyp)对全部或一部分输入信号(Vg)进行处理。 在该图中,特征校正部根据由Vx得到的VxMAX之间的关系,生成Vx = Vg,Vx = Vg'或Vx = G1×Vg'+ G2×Vg(0

    Noise canceling circuit and headphone
    17.
    发明专利
    Noise canceling circuit and headphone 审中-公开
    噪音消除电路和耳机

    公开(公告)号:JP2009284072A

    公开(公告)日:2009-12-03

    申请号:JP2008131970

    申请日:2008-05-20

    Abstract: PROBLEM TO BE SOLVED: To suppress current consumption while suppressing the mounting area of a noise canceling circuit.
    SOLUTION: The noise canceling circuit 50 includes: an A/D converting circuit 56 which converts an analog signal n1 output from a speaker 70 into a digital noise signal dn; a digital signal receiver 51 to which a multiplex digital audio signal dX with a first digital audio signal dL and a second digital audio signal dR multiplexed thereto is supplied from outside, and which separates and outputs one digital audio signal; a DSP which generates a driving digital signal dT by performing an arithmetic operation so as to cancel external noise; and a class D amplifying circuit 55 which drives the speaker 70 according to a control signal P having a pulse width corresponding to the driving digital signal dT.
    COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题:在抑制噪声消除电路的安装面积的同时抑制电流消耗。 解决方案:噪声消除电路50包括:A / D转换电路56,其将从扬声器70输出的模拟信号n1转换为数字噪声信号dn; 数字信号接收器51从外部提供具有第一数字音频信号dL和第二数字音频信号dR的复用数字音频信号dX和第二数字音频信号dX,并分离并输出一个数字音频信号; DSP,其通过执行算术运算来产生驱动数字信号dT,以消除外部噪声; 和D类放大电路55,根据具有与驱动数字信号dT对应的脉冲宽度的控制信号P来驱动扬声器70。 版权所有(C)2010,JPO&INPIT

    Signal generator and d-class amplifier
    18.
    发明专利
    Signal generator and d-class amplifier 有权
    信号发生器和D类放大器

    公开(公告)号:JP2009105703A

    公开(公告)日:2009-05-14

    申请号:JP2007276112

    申请日:2007-10-24

    CPC classification number: H03F3/217 H03F3/2173

    Abstract: PROBLEM TO BE SOLVED: To set a sampling period to a sufficiently short time for a pulse period. SOLUTION: A noise shaping filter 12 suppresses quantization noise while generating a data series DTb obtained by arranging a plurality of data X (X[1], X[2], ...) by a sampling period Tns. A pulse width modulation circuit 14 contains signal generating parts 54[1], 54[2]. The signal generating parts 54[1] generates a pulse width modulation signal S1 in which a pulse P1 setting a time point of a front edge according to the data X[1] and setting a time point of a rear edge according to the data X[2] is disposed by a pulse period TP longer than the sampling period Tns. The signal generating part 54[2] generates a pulse width modulation signal S2 in which a pulse P2 setting a time point of the front edge according to the data X[3] and setting a time point of the rear edge according to the data X[4] is disposed between the respective pulses P1 of the pulse width modulation signal S1. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:将采样周期设置为足够短的脉冲周期时间。 解决方案:噪声整形滤波器12抑制量化噪声,同时产生通过将多个数据X(X [1],X [2],...)排列在采样周期Tns上而获得的数据序列DTb。 脉宽调制电路14包含信号产生部分54 [1],54 [2]。 信号产生部分54 [1]产生脉冲宽度调制信号S1,其中根据数据X [1]设置前沿时间点的脉冲P1,并根据数据X设置后沿的时间点 [2]通过长于采样周期Tns的脉冲周期TP来布置。 信号生成部54 [2]生成脉冲宽度调制信号S2,脉冲P2根据数据X [3]设定前端的时间点,根据数据X设定后方的时间点 [4]设置在脉冲宽度调制信号S1的各个脉冲P1之间。 版权所有(C)2009,JPO&INPIT

    Class-d amplifier
    19.
    发明专利
    Class-d amplifier 有权
    CLASS-D放大器

    公开(公告)号:JP2008125004A

    公开(公告)日:2008-05-29

    申请号:JP2006309485

    申请日:2006-11-15

    Abstract: PROBLEM TO BE SOLVED: To provide a data processing apparatus such as a class-D amplifier circuit reducing manufacturing costs by reducing a size and the number of components, and improving operability by facilitating waveform setting or adjustment with flexibility in constructing a system.
    SOLUTION: A class-D amplifier 100 is adapted to generate cosine wave data with which an output voltage of an LPF 190 is not rapidly changed, as a PWM signal for the LPF 190 during a starting period or an ending period, apply noise shaping and modulate the cosine wave data into a PWM signal while selectively switching them with inputted data such as sound data to be amplified, and output the signal to the LPF 190.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题:提供诸如D类放大器电路之类的数据处理装置,通过减小组件的尺寸和数量来减少制造成本,并且通过在构造系统方面具有灵活性便利波形设置或调整来提高可操作性 。 解决方案:D类放大器100适于产生余弦波数据,LPF 190的输出电压不会快速改变,因为LPF 190在开始周期或结束周期期间的PWM信号适用 噪声整形并将余弦波数据调制成PWM信号,同时用输入的数据(例如待放大的声音数据)选择性地切换它们,并将信号输出到LPF 190.(C)2008,JPO&INPIT

    Optical disk device
    20.
    发明专利
    Optical disk device 有权
    光盘设备

    公开(公告)号:JP2008047290A

    公开(公告)日:2008-02-28

    申请号:JP2007280860

    申请日:2007-10-29

    Abstract: PROBLEM TO BE SOLVED: To perform more accurate focus control even if a laser beam is applied to a region where no sufficient reflection light can be obtained on an optical disk. SOLUTION: An optical disk recording/reproducing device performs processing (step Sa7) for determining focus control content before recording, or the like when applying the laser beam to a region having a small reflection factor for recording/reproduction. In the focus control content determination process, a test laser beam is applied to a region (for example, the innermost periphery region) having a large reflection factor on an optical disk, and the focus control content is determined and stored in a memory, based on the focus control content executed at that time. Then, focus control according to the focus control content stored in the memory is executed, when applying laser beams to the region having a small reflection factor. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题:即使在光盘上不能获得足够的反射光的区域上施加激光束,也可以进行更精确的聚焦控制。 解决方案:当将光束施加到具有小的记录/再现反射系数的区域时,光盘记录/再现装置执行用于在记录之前确定聚焦控制内容的处理(步骤Sa7)。 在焦点控制内容确定处理中,将测试激光束施加到在光盘上具有大的反射系数的区域(例如,最内周边区域),并且基于该存储器确定聚焦控制内容并存储在存储器中 在当时执行的焦点控制内容上。 然后,当将激光束施加到具有小的反射系数的区域时,执行根据存储在存储器中的聚焦控制内容的聚焦控制。 版权所有(C)2008,JPO&INPIT

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