公开(公告)号：US20110109359A1

公开(公告)日：2011-05-12

申请号：US13008748

申请日：2011-01-18

Applicant: Jody Greenberg ,  Sehat Sutardja

Inventor： Jody Greenberg ,  Sehat Sutardja

IPC: H03L7/08

CPC classification number: H03B5/02 ,  H03B5/04 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2200/005 ,  H03B2201/0266 ,  H03J2200/10 ,  H03K7/08 ,  H03L1/022 ,  H03L1/026 ,  H03L7/07 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/099 ,  H03L7/22

Abstract: An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A variable capacitance circuit is controlled based on the delay line output signal, the PWM control signal, and one of the incremental delay line signals.

Abstract translation: 集成电路包括延迟锁定环（DLL）电路，其基于接收的时钟信号产生增量延迟线信号和延迟线输出信号。 脉冲宽度调制（PWM）控制模块产生PWM控制信号。 可变电容电路根据延迟线输出信号，PWM控制信号和增量延迟线信号之一进行控制。

公开(公告)号：US07868705B2

公开(公告)日：2011-01-11

申请号：US12199871

申请日：2008-08-28

Applicant: Tomohide Aramata

Inventor： Tomohide Aramata

IPC: H03B5/12

CPC classification number: H03B5/1231 ,  H03B5/1203 ,  H03B5/1262 ,  H03B2200/0048 ,  H03B2201/0266

Abstract: In a high-frequency oscillator, a first resonance circuit and a second resonance circuit are respectively connected to a first amplifier circuit and a second amplifier circuit. A selection circuit includes a first switch circuit and a second switch circuit which selectively operate one of the first amplifier circuit and the second amplifier circuit. A grounded capacitor is connected to output sides of the first amplifier circuit and the second amplifier circuit. The grounded capacitor is commonly used by both the first amplifier circuit and the second amplifier circuit. An auxiliary grounded capacitor is connected between the first switch circuit and the first amplifier circuit. Accordingly, the grounded capacitor and the auxiliary grounded capacitor are connected to each other in parallel only when the first amplifier circuit is activated.

Abstract translation: 在高频振荡器中，第一谐振电路和第二谐振电路分别连接到第一放大器电路和第二放大器电路。 选择电路包括选择性地操作第一放大器电路和第二放大器电路之一的第一开关电路和第二开关电路。 接地电容器连接到第一放大器电路和第二放大器电路的输出侧。 接地电容器通常由第一放大器电路和第二放大器电路两者使用。 辅助接地电容器连接在第一开关电路和第一放大器电路之间。 因此，只有当第一放大器电路被激活时，接地电容器和辅助接地电容器彼此并联连接。

公开(公告)号：US20090140819A1

公开(公告)日：2009-06-04

申请号：US11947919

申请日：2007-11-30

Applicant: Aaron S. Rogers ,  Daniel W. Bailey ,  Roger D. Pannell

Inventor： Aaron S. Rogers ,  Daniel W. Bailey ,  Roger D. Pannell

IPC: H03B1/00

CPC classification number: H03B5/32 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03J2200/10

Abstract: To determine performance degradation at functional module in a normal power state due to a power control device, voltages are applied to oscillators at a power diagnostic module. A first voltage is a supply voltage for the data processing device, and a second voltage is a supply voltage applied at a functional module of the data processing device. Counters are adjusted based on the oscillators to determine the oscillators' respective frequencies. In addition, the power diagnostic module can include a timer to measure the length of time that the functional module is in a low-power state, and an analog to digital converter to measure the voltage applied to the functional module during transitions to and from the low-power state.

Abstract translation: 为了确定由于功率控制装置在正常功率状态下的功能模块的性能下降，电压被施加到功率诊断模块的振荡器。 第一电压是数据处理装置的电源电压，第二电压是在数据处理装置的功能模块上施加的电源电压。 基于振荡器调整计数器以确定振荡器的相应频率。 此外，功率诊断模块可以包括用于测量功能模块处于低功率状态的时间长度的定时器，以及模数转换器，用于测量在向和/或不同的过渡期间施加到功能模块的电压 低功率状态

公开(公告)号：US20080297218A1

公开(公告)日：2008-12-04

申请号：US12180853

申请日：2008-07-28

Applicant: Jody Greenberg ,  Sehat Sutardja

Inventor： Jody Greenberg ,  Sehat Sutardja

IPC: H03L7/00

CPC classification number: H03B5/02 ,  H03B5/04 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2200/005 ,  H03B2201/0266 ,  H03J2200/10 ,  H03K7/08 ,  H03L1/022 ,  H03L1/026 ,  H03L7/07 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/099 ,  H03L7/22

Abstract: An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A tunable circuit having variable capacitance is controlled based on the delay line output signal, the PWM control signal, and one of the incremental delay line signals.

Abstract translation: 集成电路包括延迟锁定环（DLL）电路，其基于接收的时钟信号产生增量延迟线信号和延迟线输出信号。 脉冲宽度调制（PWM）控制模块产生PWM控制信号。 基于延迟线输出信号，PWM控制信号和增量延迟线信号之一来控制具有可变电容的可调谐电路。

公开(公告)号：US20080068098A1

公开(公告)日：2008-03-20

申请号：US11629695

申请日：2006-01-30

Applicant: Takeshi Fujii ,  Mineyuki Iwaida ,  Hiroaki Ozeki

Inventor： Takeshi Fujii ,  Mineyuki Iwaida ,  Hiroaki Ozeki

IPC: H03B21/01

CPC classification number: H04B1/3805 ,  H03B5/1215 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1268 ,  H03B2201/0208 ,  H03B2201/0266

Abstract: It is intended to provide a VCO apparatus having: a local oscillation signal generation circuit for outputting a local oscillation signal corresponding to a frequency signal of a tuned channel to be received, the frequency signal being included in high frequency signals received by an input terminal, and a mixing circuit for outputting a baseband signal by mixing the high frequency signal and the local oscillation signal, wherein the local oscillation signal generation circuit has an oscillator for oscillating the local oscillation signal and a frequency reduction unit for outputting a frequency of the local oscillation signal oscillated by the oscillator to the mixing circuit at a ratio of ×1/N, and the local oscillation signal frequency is set to a frequency different from a communication wireless frequency used by a mobile phone by adjusting the ratio of ×1/N.

Abstract translation: 本发明旨在提供一种VCO装置，其具有本地振荡信号生成电路，用于输出对应于要接收的调谐信道的频率信号的本地振荡信号，所述频率信号包含在由输入端子接收的高频信号中， 以及混合电路，用于通过混合高频信号和本地振荡信号来输出基带信号，其中本地振荡信号产生电路具有用于振荡本地振荡信号的振荡器和用于输出本地振荡频率的频率降低单元 信号以x1 / N的比例由振荡器振荡到混合电路，并且通过调整x1 / N的比率将本地振荡信号频率设置为与移动电话使用的通信无线频率不同的频率。

公开(公告)号：US07280001B2

公开(公告)日：2007-10-09

申请号：US11226041

申请日：2005-09-14

Applicant: James P. Maligeorgos ,  Donald A. Kerth ,  Augusto M. Marques

Inventor： James P. Maligeorgos ,  Donald A. Kerth ,  Augusto M. Marques

IPC: H03B5/36

CPC classification number: H03B5/366 ,  H03B2200/005 ,  H03B2201/0208 ,  H03B2201/0266

Abstract: In one embodiment, the present invention includes a capacitor array that may provide a selected capacitance to a digitally controlled crystal oscillator (DCXO). The array may include multiple sections each having at least one array portion, where each section is to receive different significant portions of a digital control value. The different sections may have different coding schemes. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括可以向数字控制的晶体振荡器（DCXO）提供所选择的电容的电容器阵列。 阵列可以包括多个部分，每个部分具有至少一个阵列部分，其中每个部分将接收数字控制值的不同重要部分。 不同的部分可以具有不同的编码方案。 描述和要求保护其他实施例。

公开(公告)号：US20070222527A1

公开(公告)日：2007-09-27

申请号：US11641330

申请日：2006-12-19

Applicant: Harald Pretl

Inventor： Harald Pretl

IPC: H03L7/00

CPC classification number: H03B5/366 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/1976

Abstract: A frequency tuning circuit includes a connection for coupling to a signal tap of an element which has a resonant frequency. The tuning circuit contains a controllable-capacitance capacitance array for tuning of a signal frequency of the element. The capacitance array has a multiplicity of capacitances which can be connected to a control connection via a signal. In this case, the capacitance array is coupled to the connection. A control input is used to supply a digital control word. Furthermore, the tuning circuit contains a sigma-delta modulator whose input side is coupled to the control input and whose output side is coupled to the control connection of the capacitance array. This makes it possible to produce a tuning word by means of which the effective resolution of the capacitance array can be increased.

Abstract translation: 频率调谐电路包括用于耦合到具有谐振频率的元件的信号抽头的连接。 调谐电路包含用于调谐元件的信号频率的可控电容电容阵列。 电容阵列具有多个电容，其可以经由信号连接到控制连接。 在这种情况下，电容阵列耦合到连接。 控制输入​​用于提供数字控制字。 此外，调谐电路包含一个Σ-Δ调制器，其输入端耦合到控制输入，其输出端耦合到电容阵列的控制连接。 这使得可以产生可以增加电容阵列的有效分辨率的调谐字。

公开(公告)号：US07183867B2

公开(公告)日：2007-02-27

申请号：US10964704

申请日：2004-10-15

Applicant: Junichi Matsuura ,  Eiichi Kaminishi ,  Noriyuki Fujita

Inventor： Junichi Matsuura ,  Eiichi Kaminishi ,  Noriyuki Fujita

IPC: H03L7/00

CPC classification number: H03B5/32 ,  H03B2201/0266 ,  H03J2200/10

Abstract: To provide a voltage controlled variable capacitor which can change a capacitance value thereof in a wide controlled voltage range and control the capacitance value easily with a high precision without complicating the circuit configuration thereof, and to provide a voltage controlled variable capacitor which can change a capacitance value thereof with a good linearity. The voltage controlled varactor is configured in a manner that varactors VCk, each formed by a series connection of a fixed capacitor Ck (k=1, 2, . . . , n) and a MOS transistor Mk of N channel type, are connected in parallel. The MOS transistors M1 to Mn are configured in a manner that gate widths W are same but gate lengths L1 to Ln are elongated sequentially (that is, L1

Abstract translation: 为了提供可以在宽的受控电压范围内改变其电容值并且以高精度容易地控制电容值而不使其电路结构复杂化的电压控制可变电容器，并且提供可以改变电容的电压控制的可变电容器 其值具有良好的线性。 电压控制变容二极管被配置为使得由固定电容器C k（k = 1,2，...，n）和N沟道型的MOS晶体管Mk的串联连接形成的变容二极管VCk连接在 平行。 MOS晶体管M 1〜Mn以栅极宽度W相同但栅极长度L 1〜Ln依次延长（即，L 1

公开(公告)号：US07102454B2

公开(公告)日：2006-09-05

申请号：US11047835

申请日：2005-01-31

Applicant: Bour-Yi Sze ,  Chih-Long Ho ,  Nean-Chu Cheng

Inventor： Bour-Yi Sze ,  Chih-Long Ho ,  Nean-Chu Cheng

IPC: H03B5/08 ,  H03B5/12 ,  H03C3/00 ,  H03L7/099

CPC classification number: H03L7/10 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B2201/0266 ,  H03C3/0958 ,  H03J5/244 ,  H03L7/099 ,  H03L2207/06

Abstract: A VCO system embodying the features of the present invention includes a frequency tuning circuit, a modulation circuit coupled in a parallel fashion with the frequency tuning circuit, a band tuning circuit coupled with the frequency tuning circuit in a parallel fashion having at least one switching circuit, a core circuit coupled with the frequency tuning circuit, the modulation circuit, and the band tuning circuit, wherein upon asserting a switching signal and upon adjusting a frequency turning signal, a frequency tuning bias signal, and a band tuning signal, the switching circuit is enabled for configuring the band tuning circuit to join the frequency tuning circuit for adjusting a predetermined output frequency based on a total inductance and a total capacitance provided by the core circuit, the frequency tuning circuit, the modulation circuit and the band tuning circuit.

公开(公告)号：US20060170511A1

公开(公告)日：2006-08-03

申请号：US11046261

申请日：2005-01-28

Applicant: Jeremy Dunworth

Inventor： Jeremy Dunworth

IPC: H03B5/12

CPC classification number: H03B5/1243 ,  H03B5/1206 ,  H03B5/1265 ,  H03B2201/0266 ,  H03J2200/10

Abstract: Methods and apparatus are presented for performing coarse frequency tuning in a voltage controlled oscillator. The methods and apparatus are directed towards the use of a new voltage controlled oscillator comprising both a binary coding module and a thermometer coding module. The combination of the binary coding module and the thermometer coding module control a capacitance corresponding to a resonant tank which is used to coarse tune the frequency of the voltage controlled oscillator.

Abstract translation: 提出了用于在压控振荡器中执行粗调频调谐的方法和装置。 该方法和装置旨在使用包括二进制编码模块和温度计编码模块的新的压控振荡器。 二进制编码模块和温度计编码模块的组合控制对应于用于粗调压控振荡器的频率的谐振槽的电容。