公开(公告)号：US20100009645A1

公开(公告)日：2010-01-14

申请号：US12504874

申请日：2009-07-17

Applicant: Lawrence Der ,  Dana Taipale ,  Scott Willingham

Inventor： Lawrence Der ,  Dana Taipale ,  Scott Willingham

IPC: H04B1/18 ,  H03L7/00

CPC classification number: H03B5/32 ,  H03B2201/025 ,  H03D7/165 ,  H03J1/0008 ,  H03J2200/10

Abstract: In one embodiment, the present invention includes a method for determining if a frequency control instruction would cause a first capacitor bank to reach a limit and adjusting the first capacitor bank in a first direction using a calibration value and adjusting a second capacitor bank in a second direction if the first capacitor bank would reach the limit. Furthermore, the calibration value may be calculated and stored in accordance with other embodiments. In such manner, small changes in capacitance and correspondingly small changes in frequency may be effected.

Abstract translation: 在一个实施例中，本发明包括一种用于确定频率控制指令是否会使第一电容器组达到限制并且使用校准值在第一方向上调整第一电容器组并在第二电容器组中调整第二电容器组的方法 方向如果第一个电容器组达到极限。 此外，可以根据其他实施例来计算和存储校准值。 以这种方式，可以实现电容的小的变化和相应的小的频率变化。

公开(公告)号：US07639092B2

公开(公告)日：2009-12-29

申请号：US11837042

申请日：2007-08-10

Applicant: David H. Shen ,  Ann P. Shen

Inventor： David H. Shen ,  Ann P. Shen

IPC: H03B5/36

CPC classification number: H03B5/36 ,  H03B2201/025 ,  H03J2200/10

Abstract: Embodiments feature techniques and systems for analog and digital tuning of crystal oscillators. In one aspect, some implementations feature a method for tuning a frequency of a crystal oscillator that can include adjusting the tuning frequency of the crystal oscillator from a nominal frequency via a switched-capacitor frequency tuning circuit, the switched-capacitor frequency tuning circuit can have switchable sections to adjust the tuning of the crystal oscillator. The method can include controlling an analog control input that is coupled to a varactor within each of the switchable sections, where each of the switchable sections can include a fixed capacitor in series with the varactor and a switch. The method can involve controlling a digital control input, where the digital control input can electrically connect or disconnect one or more of the switchable sections from the crystal. There can be independent control between the digital and analog tuning mechanisms.

Abstract translation: 实施例用于晶体振荡器的模拟和数字调谐的技术和系统。 一方面，一些实施方式的特征在于一种用于调谐晶体振荡器的频率的方法，该方法可以包括通过开关电容器频率调谐电路从标称频率调整晶体振荡器的调谐频率，开关电容器频率调谐电路可以具有 可切换部分来调节晶体振荡器的调谐。 该方法可以包括控制耦合到每个可切换部分内的变容二极管的模拟控制输入，其中每个可切换部分可以包括与变容二极管串联的固定电容器和开关。 该方法可以涉及控制数字控制输入，其中数字控制输入可以将一个或多个可切换部分与晶体电连接或断开。 数字和模拟调谐机制之间可以独立控制。

公开(公告)号：US20090224843A1

公开(公告)日：2009-09-10

申请号：US12045224

申请日：2008-03-10

Applicant: Liviu-Mihai Radoias ,  Radu H. Iacob ,  Iulian Dumitru

Inventor： Liviu-Mihai Radoias ,  Radu H. Iacob ,  Iulian Dumitru

IPC: H03B5/32

CPC classification number: H03B5/32 ,  H03B2201/025 ,  H03J2200/10

Abstract: A crystal oscillator circuit having a parallel resonant frequency that is adjustable by switching trim capacitors in parallel with a crystal.

Abstract translation: 具有并联谐振频率的晶体振荡器电路，其可通过与晶体并联开关微调电容器来调节。

公开(公告)号：US07573342B2

公开(公告)日：2009-08-11

申请号：US11781145

申请日：2007-07-20

Applicant: Christian Grewing ,  Stefan Heinrich van Waasen ,  Emericks Anders

Inventor： Christian Grewing ,  Stefan Heinrich van Waasen ,  Emericks Anders

IPC: H03B1/00

CPC classification number: H03L7/0995 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B2201/0208 ,  H03B2201/025 ,  H03J2200/10

Abstract: A VCO device is described that has pre-compensation. Digitally switchable compensation capacitors are selectively activated to adjust operation of the VCO to mitigate undesirable operational effects. In some example embodiments, the digitally switchable compensation capacitors of the VCO are adjusted to compensate for the effects of activating (from a quiescent state) an output buffer driven by the VCO.

Abstract translation: 描述了具有预补偿的VCO器件。 选择性地激活数字可切换补偿电容器以调节VCO的操作以减轻不期望的操作效果。 在一些示例实施例中，调整VCO的数字可切换补偿电容器以补偿由VCO驱动的输出缓冲器激活（从静止状态）的影响。

公开(公告)号：US07468620B2

公开(公告)日：2008-12-23

申请号：US11462802

申请日：2006-08-07

Applicant: Tsuoe-Hsiang Liao

Inventor： Tsuoe-Hsiang Liao

IPC: H03B19/00

CPC classification number: G11C17/18 ,  G11C17/16 ,  H01L23/5256 ,  H01L2924/0002 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/1268 ,  H03B2201/025 ,  H03D13/004 ,  H03K3/0315 ,  H01L2924/00

Abstract: A frequency generator apparatus and a control circuit thereof are provided. The frequency generator apparatus comprises the control circuit and a frequency generator, wherein the control circuit contains an electric fuse (efuse). The control circuit outputs an enabling signal according to the state of the efuse. The frequency generator is coupled to the control circuit, receives the enabling signal, and decides to output a frequency signal or not according to the enabling signal.

Abstract translation: 提供了一种频率发生器装置及其控制电路。 频率发生器装置包括控制电路和频率发生器，其中控制电路包含电熔丝（efuse）。 所述控制电路根据所述efuse的状态输出使能信号。 频率发生器耦合到控制电路，接收使能信号，并根据使能信号决定输出频率信号。

公开(公告)号：US07449963B2

公开(公告)日：2008-11-11

申请号：US11754804

申请日：2007-05-29

Applicant: Ramon A. Gomez

Inventor： Ramon A. Gomez

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for-changing PLL operating conditions, in addition to compensating for variable VCO gain.

Abstract translation: 增益补偿器补偿锁相环（PLL）中变容二极管调谐电压调谐振荡器（VCO）的增益变化。 VCO包括具有多个固定电容器的并联LC电路，其可以根据电容器控制信号切换或切换出LC电路，以执行VCO的频带选择调谐。 增益补偿器通过产生基于控制LC电路中的固定电容器的相同电容器控制信号的电荷泵参考电流来补偿可变VCO增益。 增益补偿器通过使用单位电流源复制参考刻度电流来产生电荷泵参考电流。 参考比例电流复制的次数是基于切换到LC电路的固定电容，因此是PLL的频带。 参考比例电流是基于特定于参考频率，环路带宽和环路阻尼等特定PLL特性的PLL控制产生的。 因此，除了补偿可变VCO增益之外，参考泵电流可以有效地优化用于改变PLL工作条件。

公开(公告)号：US20080150644A1

公开(公告)日：2008-06-26

申请号：US11885859

申请日：2006-01-26

Applicant: Kenichi Hosoya ,  Shigeki Wada

Inventor： Kenichi Hosoya ,  Shigeki Wada

IPC: H03B5/12

CPC classification number: H03B5/1231 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/124 ,  H03B5/1265 ,  H03B5/1293 ,  H03B2201/025 ,  H03J2200/10

Abstract: A voltage controlled oscillator of the present invention includes power supply terminal (101), control terminal (2) for controlling an output frequency, output terminals (3a, 3b), cross-coupled transistors (5a, 5b), capacitances (6a, 6b, 7a, 7b), LC tanks (10a, 10b), resistor (117), grounding capacitance (18) and center frequency control circuit (16). Center frequency control circuit (16) includes resistors (11a, 11b), grounding capacitance (12), center frequency control terminal (4) for controlling a center frequency of the output frequency, and voltage-divider circuit (15). Resistors (11a, 11b) are connected to the base terminals of cross-coupled transistors (5a, 5b), the other ends of resistors (11a, 11b) are connected to each other, and, to this connecting point, one end of grounding capacitance (12) and one end of voltage-divider circuit (15) are connected. The other end of voltage-divider circuit (15) is connected to center frequency control terminal (4).

Abstract translation: 本发明的压控振荡器包括电源端子（101），用于控制输出频率的控制端子（2），输出端子（3a，3b），交叉耦合晶体管（5a，5b），电容 （6a，6b，7a，7b），LC箱（10a，10b），电阻器（117），接地电容（18）和中心频率控制电路（16）。 中心频率控制电路（16）包括用于控制输出频率的中心频率的电阻器（11a，11b），接地电容（12），中心频率控制端子（4）和分压电路（15）。 电阻器（11a，11b）连接到交叉耦合晶体管（5a，5b）的基极端子，电阻器（11a，11b）的另一端彼此连接，并且在该连接 点，接地电容（12）的一端和分压电路（15）的一端相连。 分压器电路（15）的另一端连接到中心频率控制端子（4）。

公开(公告)号：US20080143454A1

公开(公告)日：2008-06-19

申请号：US12036185

申请日：2008-02-22

Applicant: Michael Shannon McCorquodale ,  Scott Michael Pernia ,  Sundus Kubba ,  Justin O'Day ,  Gordon Carichner

Inventor： Michael Shannon McCorquodale ,  Scott Michael Pernia ,  Sundus Kubba ,  Justin O'Day ,  Gordon Carichner

IPC: H03B5/12

CPC classification number: G06F1/04 ,  G06F1/08 ,  H03B5/06 ,  H03B5/1203 ,  H03B5/1215 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/1256 ,  H03B5/1265 ,  H03B2201/025 ,  H03J1/0008 ,  H03J2200/10 ,  H03L1/022 ,  H03L3/00 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/0891 ,  H03L7/099

Abstract: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which is integrated with other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

Abstract translation: 在各种实施例中，本发明提供使用LC振荡器拓扑的时钟发生器和/或定时和频率参考，其具有频率控制器以控制和提供稳定的谐振频率，其与其它第二电路（例如处理器 或控制器。 提供了频率稳定性，如选择的参数（如温度和制造工艺变化）的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器，其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中，响应于温度波动将传感器实现为电流源，并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感，并且可以是二进制加权的。 还提供了电阻模块的阵列，以产生一个或多个控制电压。

公开(公告)号：US07365614B2

公开(公告)日：2008-04-29

申请号：US11384758

申请日：2006-03-20

Applicant: Michael Shannon McCorquodale ,  Scott Michael Pernia ,  Sundus Kubba ,  Justin O'Day ,  Gordon Carichner

Inventor： Michael Shannon McCorquodale ,  Scott Michael Pernia ,  Sundus Kubba ,  Justin O'Day ,  Gordon Carichner

IPC: H03B5/12

CPC classification number: G06F1/04 ,  G06F1/08 ,  H03B5/06 ,  H03B5/1203 ,  H03B5/1215 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/1256 ,  H03B5/1265 ,  H03B2201/025 ,  H03J1/0008 ,  H03J2200/10 ,  H03L1/022 ,  H03L3/00 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/0891 ,  H03L7/099

Abstract: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference using an LC-oscillator topology, having a frequency controller to control and provide a stable resonant frequency, which is integrated with other, second circuitry such as a processor or controller. Frequency stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the resonator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

Abstract translation: 在各种实施例中，本发明提供使用LC振荡器拓扑的时钟发生器和/或定时和频率参考，其具有频率控制器以控制和提供稳定的谐振频率，其与其它第二电路（例如处理器 或控制器。 提供了频率稳定性，如选择的参数（如温度和制造工艺变化）的变化。 各种装置实施例包括适于响应于多个参数的至少一个参数提供信号的传感器; 以及频率控制器，其适于响应于所述第二信号来修改所述谐振频率。 在示例性实施例中，响应于温度波动将传感器实现为电流源，并且频率控制器被实现为可选择地耦合到谐振器或一个或多个控制电压的多个受控电抗模块。 受控电抗模块可以包括固定或可变电容或电感，并且可以是二进制加权的。 还提供了电阻模块的阵列，以产生一个或多个控制电压。

公开(公告)号：US20070145368A1

公开(公告)日：2007-06-28

申请号：US11645382

申请日：2006-12-26

Applicant: Makoto Watanabe

Inventor： Makoto Watanabe

IPC: H01L31/00

CPC classification number: H03B5/36 ,  H03B2200/0048 ,  H03B2201/025

Abstract: The present invention relates to a two-frequency switchover type crystal oscillator in which first and second IC chips and first and second crystal resonators are connected to wiring patterns of a circuit substrate to form first and second oscillation circuits, and the first and second oscillation circuits are selectively operated in accordance with a selection mechanism; a two-frequency switchover type crystal oscillator in which surfaces opposite to circuit function surfaces of the first and second IC chips are connected to form a two-stage structure; IC terminals of the circuit function surface of the first IC chip are directly connected both electrically and mechanically to the wiring patterns; and IC terminals of the circuit function surface of the second IC chip are connected electrically by wire bonding to the wiring patterns; wherein those wiring patterns of the wiring patterns that are connected to power source, output, and ground terminals of the first and second IC chips are connected in common with respect to the first and second oscillation circuits. This configuration reduces the mounting surface area of the first and second IC chips, facilitating the wiring patterns thereof, thus making it possible to provide a two-frequency switchover oscillator in which the surface area of the external plan view is reduced.

Abstract translation: 本发明涉及一种双频切换型晶体振荡器，其中第一和第二IC芯片和第一和第二晶体谐振器连接到电路基板的布线图案以形成第一和第二振荡电路，第一和第二振荡电路 根据选择机构选择性地操作; 其中与第一和第二IC芯片的电路功能表面相对的表面连接以形成两级结构的双频切换型晶体振荡器; 第一IC芯片的电路功能表面的IC端子电连接和机械地直接连接到布线图案; 并且第二IC芯片的电路功能表面的IC端子通过引线接合电连接到布线图案; 其中连接到第一和第二IC芯片的电源，输出和接地端子的布线图形的那些布线图案相对于第一和第二振荡电路共同连接。 这种结构减小了第一和第二IC芯片的安装表面积，便于其布线图案，从而可以提供其中外部平面图的表面积减小的双频切换振荡器。