PROCESS FOR THE SINGULATION OF INTEGRATED DEVICES IN THIN SEMICONDUCTOR CHIPS
    231.
    发明申请
    PROCESS FOR THE SINGULATION OF INTEGRATED DEVICES IN THIN SEMICONDUCTOR CHIPS 审中-公开
    在半导体芯片中集成器件的整合过程

    公开(公告)号:WO2005104223A1

    公开(公告)日:2005-11-03

    申请号:PCT/EP2005/051694

    申请日:2005-04-18

    CPC classification number: H01L21/78

    Abstract: A process for the fabrication of an integrated device in a semiconductor chip envisages: forming a semiconductor layer (5') partially suspended above a semiconductor substrate (2) and constrained to the substrate (2) by temporary anchorages (10, 15'); dividing the layer (5') into a plurality of portions (13) laterally separated from one another; and removing the temporary anchorages (10, 15'; 38), in order to free the portions (13).

    Abstract translation: 用于制造半导体芯片中的集成器件的方法设想:形成半导体衬底(2)部分悬置并通过临时锚固(10,15')约束到衬底(2)的半导体层(5'); 将层(5')分成彼此横向分离的多个部分(13); 以及移除所述临时锚固件(10,15'; 38),以便释放所述部分(13)。

    POWER DEVICE WITH HIGH SWITCHING SPEED AND MANUFACTURING METHOD THEREOF
    232.
    发明申请
    POWER DEVICE WITH HIGH SWITCHING SPEED AND MANUFACTURING METHOD THEREOF 审中-公开
    具有高开关速度的电力设备及其制造方法

    公开(公告)号:WO2004102671A1

    公开(公告)日:2004-11-25

    申请号:PCT/IT2003/000298

    申请日:2003-05-19

    CPC classification number: H01L29/66378 H01L29/7455

    Abstract: A power device (1) formed by a thyristor (25) and by a MOSFET transistor (26), series-connected between a first and a second current-conduction terminal (A, S). the power device (1) moreover has a control terminal (G) connected to an insulated-gate electrode (20) of the MOSFET transistor (26) and receiving a control voltage for turning on/off the device, and a third current-conduction terminal (B) connected to the thyristor (25) for fast extraction of charges during turning-off. Thereby, upon turning off, there are no current tails, and turning off is very fast. The power device does not have parasitic components and consequently has a very high reversebias safe-operating area (RBSOA).

    Abstract translation: 由晶闸管(25)和串联连接在第一和第二导通端子(A,S)之间的MOSFET晶体管(26)形成的功率器件(1)。 功率器件(1)还具有连接到MOSFET晶体管(26)的绝缘栅电极(20)的控制端子(G),并接收用于接通/关断器件的控制电压和第三电流传导 端子(B)连接到晶闸管(25),用于在关断期间快速提取电荷。 因此,在关闭时,没有当前尾部,并且关闭非常快。 功率器件没有寄生元件,因此具有非常高的反向保护工作区(RBSOA)。

    EARLY-LATE SYNCHRONIZER HAVING REDUCED TIMING JITTER
    233.
    发明申请
    EARLY-LATE SYNCHRONIZER HAVING REDUCED TIMING JITTER 审中-公开
    具有减少时序抖动的早期同步器

    公开(公告)号:WO2004047327A1

    公开(公告)日:2004-06-03

    申请号:PCT/EP2002/012814

    申请日:2002-11-15

    CPC classification number: H04B1/7085 H04B1/709

    Abstract: A device for maintaining fine alignment between an incoming spread spectrum signal and a locally generated code in a digital communication receiver comprises: - a delay line (56) for storing a plurality of consecutive samples (E-1, E, M, L, L+1) of the incoming spread spectrum signal; - three digitally controlled interpolators (24, 26, 28) for determining by interpolation between consecutive samples an interpolated early sample (e), an interpolated middle sample (m) and an interpolated late sample (1); - two correlators (30, 32) for calculating an error signal (ξ) as the difference between the energy of the symbols computed from the interpolated early (e) and late (1) samples; - a circuit for generating a control signal (S¿OUT?) for controlling the interpolation phase of the digitally controlled interpolator (24) for the early sample (e), and - a digital non-linear filter (68), for smoothing the control signal (S¿OUT?) of the interpolator (24) for the early sample (e), enabling the update operation of the control signal only when the absolute value (|ξ(n)|) of the error signal at a time instant n is smaller than the absolute value (|ξ(n-1)|) of the same error signal at a time instant n-1.

    Abstract translation: 一种用于在数字通信接收机中保持输入扩频信号与本地生成代码之间的精确对准的装置,包括: - 延迟线(56),用于存储多个连续样本(E-1,E,M,L,L +1)的入射扩频信号; - 三个数字控制内插器(24,26,28),用于通过内插的早期采样(e),内插中间样本(m)和插值后期样本(1)来确定连续采样之间的内插; - 用于计算误差信号(xi)的两个相关器(30,32)作为从内插的早期(e)和晚期(1)样本计算的符号的能量之间的差; - 用于产生用于控制用于早期采样(e)的数字控制内插器(24)的内插相位的控制信号(S _ OUT <)的电路,以及 - 数字非线性滤波器(68),用于平滑 用于早期采样(e)的内插器(24)的控制信号(S _OUT?),使得只有当误差信号的绝对值(|| xi(n)||) 时刻n小于在时刻n-1的相同误差信号的绝对值(|| xi(n-1)||)。

    DIFFERENTIAL AMPLIFIER CIRCUIT WITH COMMON MODE OUTPUT VOLTAGE REGULATION
    234.
    发明申请
    DIFFERENTIAL AMPLIFIER CIRCUIT WITH COMMON MODE OUTPUT VOLTAGE REGULATION 审中-公开
    具有共模输出电压调节的差分放大器电路

    公开(公告)号:WO2003012983A1

    公开(公告)日:2003-02-13

    申请号:PCT/EP2002/007524

    申请日:2002-07-05

    CPC classification number: H03F3/45937 H03F1/303

    Abstract: The circuit comprises a differential amplifier (10) with two inputs and two outputs and a common mode regulation circuit. Between a regulation terminal (INCM) of the amplifier and the outputs there are connected a first (C1p) and a second (1m) capacitor and first (C3) and second (C4) capacitive means that by means of controlled switches (SW9-SW12) can be alternatively and simultaneousy connected in parallel with, respectively, the first ((C1p) and the second (C1m) capacitor or between a first (VB) and a second (Vref1) reference voltage terminal. The capacitances C3 and C4 may be different in value such as to satisfy the following equality: Vcmn = Vref1 + '(Vrefp-Vrefm)/2!* (C4-C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vref1 is the voltage of the second reference terminal.are chosen in such a way as to satisfy the following equality : Vcmn = Vref1 + [(Vrefp-Vrefm)/2] * (C4-C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vref1 is the voltage of the second reference terminal.

    Abstract translation: 该电路包括具有两个输入和两个输出的差分放大器(10)和一个共模调节电路。 在放大器的调节端子(INCM)和输出端之间连接有第一(C1p)和第二(1m)电容器以及通过受控开关(SW9-SW12)的第一(C3)和第二(C4)电容装置 )可以分别与第一((C1p)和第二(C1m)电容器或第一(VB)和第二(Vref1)参考电压端子并联连接,电容C3和C4可以是 不同的值,以满足以下等式:Vcmn = Vref1 +'(Vrefp-Vrefm)/ 2!*(C4-C3)/(C3 + C4),其中Vcmn是期望的共模输出电压,Vrefp和Vrefm 是差分输出电压,Vref1是第二参考端子的电压,以满足以下等式的方式选择:Vcmn = Vref1 + [(Vrefp-Vrefm)/ 2] *(C4-C3)/( C3 + C4),其中Vcmn是所需的共模输出电压,Vrefp和Vrefm是差分输出电压,Vref1是秒的电压 参考端子。

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE

    公开(公告)号:WO2021240305A1

    公开(公告)日:2021-12-02

    申请号:PCT/IB2021/054304

    申请日:2021-05-19

    Inventor: CREMA, Paolo

    Abstract: A method comprises molding laser direct structuring material (10), having particles (12) dispersed therein, onto at least one semiconductor die (11), applying laser beam energy to produce structured formations (14) with a part of the particles (12) exposed at the structured formations (14), contacting the structured formations (14) with a solution containing one or more organic compounds, forming a film covering at least partly the structured formations (14) and comprising one or more conductive polymers resulting from a polymerization reaction of the one or more organic compounds, and forming electrically-conductive material (24) onto the film.

    ÉLÉMENT SÉCURISÉ EMBARQUÉ
    237.
    发明申请

    公开(公告)号:WO2020193664A1

    公开(公告)日:2020-10-01

    申请号:PCT/EP2020/058434

    申请日:2020-03-25

    Abstract: La présente description concerne un élément sécurisé embarqué (E) comprenant une mémoire volatile (PRAM), et étant configuré pour mettre en oeuvre au moins une partie d'une première application (App30) et au moins une partie d'une ou plusieurs deuxièmes applications (App31) adaptées à être mises en oeuvre par au moins un système d'exploitation de bas niveau (113) de l'élément sécurisé embarqué (E), dans lequel: - des données d'exécution de ladite première application (App30) sont stockées dans une première partie réservée de ladite mémoire volatile (PRAM) configurée pour stocker uniquement des données d'exécution de ladite première application (App30); et - des données d'exécution desdites deuxièmes applications sont stockées dans une deuxième partie de ladite mémoire volatile (PRAM) distincte de la première partie réservée de ladite mémoire volatile (PRAM).

    ELECTRONIC DEVICE WITH A MAINTAIN POWER SIGNATURE (MPS) DEVICE AND ASSOCIATED METHODS
    239.
    发明申请
    ELECTRONIC DEVICE WITH A MAINTAIN POWER SIGNATURE (MPS) DEVICE AND ASSOCIATED METHODS 审中-公开
    具有维护功率签名(MPS)设备和相关方法的电子设备

    公开(公告)号:WO2017046657A1

    公开(公告)日:2017-03-23

    申请号:PCT/IB2016/051655

    申请日:2016-03-23

    Abstract: An electronic device includes a rectifier bridge (130) that includes an input configured to be coupled to power over Ethernet (PoE) power sourcing equipment (PSE), and an output. A transistor (140) is configured to selectively couple the output with a load. The electronic device includes a maintain power signature (MPS) device (170), and a control circuit (180). The control circuit is to maintain the transistor on when a load current is above a threshold, source current from the rectifier bridge to the MPS device when the load current is below the threshold, and switch the transistor to a diode configuration when the load current is below the threshold.

    Abstract translation: 电子设备包括整流器桥(130),其包括被配置为耦合到以太网供电(PoE)电源设备(PSE))的输入端和输出端。 晶体管(140)被配置为选择性地将输出与负载耦合。 电子设备包括维护功率签名(MPS)设备(170)和控制电路(180)。 当负载电流低于阈值时,控制电路将保持晶体管导通,当负载电流高于阈值时,源电流从整流桥到MPS器件,当负载电流为负载电流时,将晶体管切换到二极管配置 低于门槛。

    METHODS FOR PROVIDING A RESPONSE TO A SCP80 COMMAND REQUESTING THE EXECUTION OF A PROACTIVE COMMAND, RELATED UNIVERSAL INTEGRATED CIRCUIT CARD, MOBILE DEVICE, SERVER AND COMPUTER PROGRAM PRODUCT
    240.
    发明申请
    METHODS FOR PROVIDING A RESPONSE TO A SCP80 COMMAND REQUESTING THE EXECUTION OF A PROACTIVE COMMAND, RELATED UNIVERSAL INTEGRATED CIRCUIT CARD, MOBILE DEVICE, SERVER AND COMPUTER PROGRAM PRODUCT 审中-公开
    向SCP80提出响应的方法,要求执行一个主动的指令,相关的通用集成电路卡,移动设备,服务器和计算机程序产品

    公开(公告)号:WO2016108096A1

    公开(公告)日:2016-07-07

    申请号:PCT/IB2015/058635

    申请日:2015-11-09

    CPC classification number: H04W4/60 G06F3/0659 H04W4/14 H04W12/02

    Abstract: A method for providing, e.g. by means of an application (S_APPa) installed on an Universal Integrated Circuit Card (108a),a response to a SCP80 command is described. Initially, a first SMS message is received, e.g. by means of a mobile device (10), from a remote server (MNO) and decrypted according to the protocol SCP80. Specifically, this first SMS message contains a first command requesting the execution of a proactive command. Once, the proactive command has been executed and a respective response has been obtained,a second SMS message (SMS3) is transmitted to the remote server (MNO) indicating that the response has been obtained. Next, a third SMS message (SMS4) is received from the remote server (MNO)and decrypted according to the protocol SCP80. Specifically, this third SMS message (SMS4) contains a second command (C-APDU2) requesting the transmission of a response message determined as a function of the proactive command response(RSP1). Accordingly, the response message (R-APDU1)may be generated, encrypted according to the protocol SCP80 and transmitted(SMS5) the remote server (MNO).

    Abstract translation: 一种提供 通过安装在通用集成电路卡(108a)上的应用(S_APPa),描述对SCP80命令的响应。 最初,接收到第一SMS消息,例如, 通过移动设备(10)从远程服务器(MNO)发送并根据协议SCP80进行解密。 具体来说,该第一SMS消息包含请求执行主动命令的第一命令。 一旦已经执行了主动命令并获得了相应的响应,则向远程服务器(MNO)发送指示已经获得响应的第二SMS消息(SMS3)。 接下来,从远程服务器(MNO)接收第三SMS消息(SMS4),并根据协议SCP80进行解密。 具体地说,该第三SMS消息(SMS4)包含请求发送作为主动命令响应(RSP1)的函数确定的响应消息的第二命令(C-APDU2)。 因此,可以根据协议SCP80生成响应消息(R-APDU1),并发送(SMS5)远程服务器(MNO)。

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