公开(公告)号：WO2012015393A1

公开(公告)日：2012-02-02

申请号：PCT/US2010/043337

申请日：2010-07-27

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMICROELECTRONICS, INC. ,  VINET, Maud ,  LIU, Qing

Inventor： VINET, Maud ,  LIU, Qing

IPC: H01L21/336 ,  H01L21/74 ,  H01L29/786

CPC classification number: H01L29/78 ,  H01L21/743 ,  H01L21/76895 ,  H01L21/823418 ,  H01L21/823475 ,  H01L21/823814 ,  H01L21/823871 ,  H01L21/84 ,  H01L29/41733 ,  H01L29/66477 ,  H01L29/66772 ,  H01L29/78645 ,  H01L29/78648

Abstract: Transistor with counter-electrode connection amalgamated with the source/drain contact The field effect device (7) comprises an active area (5) made from semi-conducting material (4) and a gate electrode (8) separated from the active area (5) by a dielectric gate material (9). A counter-electrode (14) is separated from the active area (5) by a layer (3) of electrically insulating material. Two source/drain contacts (12, 13) are arranged on the active area (5) on each side of the gate electrode (8). One of the source/drain contacts (13) is made from a single material, overspills from the active area (5) and connects the active area (5) with the counter-electrode (14). The counter-electrode contact (13) is delineated by a closed peripheral insulating pattern (6).

Abstract translation: 具有与源极/漏极接触连接的对电极连接的晶体管场效应器件（7）包括由半导电材料（4）制成的有源区域（5）和与有源区域（5）分离的栅电极（8） ）通过介质栅极材料（9）。 反电极（14）通过电绝缘材料层（3）与有源区域（5）分离。 在栅电极（8）的每一侧上的有源区（5）上布置有两个源极/漏极触点（12,13）。 源极/漏极触点（13）中的一个由单个材料制成，从有源区域（5）突出并且将有源区域（5）与对电极（14）连接。 对电极触点（13）由封闭的外围绝缘图案（6）描绘。

公开(公告)号：WO2006001942A2

公开(公告)日：2006-01-05

申请号：PCT/US2005/017261

申请日：2005-05-18

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. ,  STMICROELECTRONICS, INC. ,  FRICKE, Peter, J. ,  VAN BROCKLIN, Andrew, L. ,  JACKSON, Warren, B. ,  CRIVELLI, Barbara ,  SOTGIU, Ricardo

Inventor： FRICKE, Peter, J. ,  VAN BROCKLIN, Andrew, L. ,  JACKSON, Warren, B. ,  CRIVELLI, Barbara ,  SOTGIU, Ricardo

IPC: H01L21/00

CPC classification number: H01L29/88 ,  H01L21/76

Abstract: A two-terminal electronic isolation device (10) has an anode (20), a cathode (30), an integral tunnel junction (50), and a current-injection layer (40). The current-injection layer (40) comprises a silicon-rich oxide.

Abstract translation: 两端子电子隔离装置（10）具有阳极（20），阴极（30），整体隧道结（50）和电流注入层（40）。 电流注入层（40）包括富硅氧化物。

公开(公告)号：US12242663B2

公开(公告)日：2025-03-04

申请号：US18063584

申请日：2022-12-08

Applicant: STMICROELECTRONICS, INC.

Inventor： Swapnil Sayan Saha ,  Mahesh Chowdhary

IPC: G06F3/01 ,  G06F1/16 ,  G06F3/0346

Abstract: An electronic device includes a sensor unit. The sensor unit includes a sensor and low power, low area sensor processing unit. The sensor processing unit performs an unsupervised machine learning processes to learn to recognize an activity or motion of the user or device. The user can request to learn the new activity. The sensor processing unit can request that the user remain stationary for a selected period of time before performing the activity. The sensor processing unit records sensor data while the user performs the activity and generates an activity template from the sensor data. The sensor processing can then infer when the user is performing the activity by comparing sensor signals to the activity template.

公开(公告)号：US12211853B2

公开(公告)日：2025-01-28

申请号：US18326841

申请日：2023-05-31

Applicant: STMICROELECTRONICS, INC.

Inventor： John H. Zhang

IPC: H01L27/12 ,  H01L21/266 ,  H01L21/8238 ,  H01L21/84 ,  H01L23/528 ,  H01L27/092 ,  H01L29/06 ,  H01L29/161 ,  H01L29/66 ,  H01L29/78 ,  H10B10/00 ,  H10B20/00

Abstract: Single gate and dual gate FinFET devices suitable for use in an SRAM memory array have respective fins, source regions, and drain regions that are formed from portions of a single, contiguous layer on the semiconductor substrate, so that STI is unnecessary. Pairs of FinFETs can be configured as dependent-gate devices wherein adjacent channels are controlled by a common gate, or as independent-gate devices wherein one channel is controlled by two gates. Metal interconnects coupling a plurality of the FinFET devices are made of a same material as the gate electrodes. Such structural and material commonalities help to reduce costs of manufacturing high-density memory arrays.

公开(公告)号：US20240345644A1

公开(公告)日：2024-10-17

申请号：US18638354

申请日：2024-04-17

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics, Inc.

Inventor： Olivier Lemarchand ,  Pierre-Loic Felter ,  Darin K. Winterton ,  Kalyan-Kumar Vadlamudi-Reddy

IPC: G06F1/3231 ,  G01S7/41 ,  G01S13/56

CPC classification number: G06F1/3231 ,  G01S7/415 ,  G01S13/56

Abstract: In accordance with embodiments, methods and systems for utilizing multiple threshold checkers are provided. A range sensor collects measurement data. The range sensor examines the measurement data based on multiple threshold checkers to determine satisfaction of a trigger condition. In response to the satisfaction of the trigger condition, the range sensor provides the measurement data to a host computing device of the range sensor.

公开(公告)号：US20240244406A1

公开(公告)日：2024-07-18

申请号：US18617533

申请日：2024-03-26

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS, INC.

Inventor： Karimuddin SAYED ,  Chandandeep Singh PABLA ,  Lorenzo BRACCO ,  Federico RIZZARDINI

IPC: H04W4/38 ,  G01D5/244 ,  G01D9/00 ,  H04W4/70

CPC classification number: H04W4/38 ,  G01D5/24404 ,  G01D9/005 ,  H04W4/70

Abstract: In an embodiment, a device comprises a memory, which, in operation, stores data samples associated with a plurality of data sensors, and circuitry, coupled to the memory, wherein the circuitry, in operation, generates synchronized output data sets associated with the plurality of data sensors. Generating a synchronized output data set includes: determining a reference sample associated with a sensor of the plurality of sensors; verifying a timing validity of a data sample associated with another sensor of the plurality of sensors; identifying a closest-in-time data sample associated with the another sensor of the plurality of sensors with respect to the reference sample; and generating the synchronized output data set based on interpolation.

公开(公告)号：US11921655B2

公开(公告)日：2024-03-05

申请号：US17307893

申请日：2021-05-04

Applicant: STMICROELECTRONICS, INC.

Inventor： Massimo Panzica ,  Maurizio Gentili

IPC: G06F13/28 ,  G06F13/24 ,  H04L9/32

CPC classification number: G06F13/28 ,  G06F13/24 ,  H04L9/3247 ,  G06F2213/24 ,  G06F2213/28

Abstract: A microcontroller includes a memory, direct memory access (DMA) controllers and a microprocessor. The microprocessor maintains one or more memory protection (MP) configurations to control access to protected memory areas of the microcontroller. In response to a secure service call of an unsecure user-application, the microprocessor executes a state machine which disables interrupt requests, determining whether DMA controller configurations and MP configurations satisfy secure-service criteria. When the secure-service criteria are satisfied, at least one secure operation associated with the secure service call is performed, and memory areas accessed during the execution of the at least one secure operation are cleaned. The interrupt requests are re-enabled and a response to the secure service call is generated.

公开(公告)号：US11848256B2

公开(公告)日：2023-12-19

申请号：US17510079

申请日：2021-10-25

Applicant: STMICROELECTRONICS, INC.

Inventor： Jefferson Talledo

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49568 ,  H01L21/4828 ,  H01L21/4871 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49513 ,  H01L23/49531 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247

Abstract: Embodiments of the present disclosure are directed to leadframe semiconductor packages having die pads with cooling fins. In at least one embodiment, the leadframe semiconductor package includes leads and a semiconductor die (or chip) coupled to a die pad with cooling fins. The cooling fins are defined by recesses formed in the die pad. The recesses extend into the die pad at a bottom surface of the semiconductor package, such that the bottom surfaces of the cooling fins of the die pad are flush or coplanar with a surface of the package body, such as an encapsulation material. Furthermore, bottom surfaces of the cooling fins of the die pad are flush or coplanar with exposed bottom surfaces of the leads.

公开(公告)号：US20230400904A1

公开(公告)日：2023-12-14

申请号：US17806813

申请日：2022-06-14

Applicant: STMicroelectronics, Inc. ,  STMICROELECTRONICS (BEIJING) R&D CO. LTD ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Arnaud Deleule ,  Kalyan-Kumar Vadlamudi-Reddy ,  Darin K Winterton ,  Jihong Chen ,  Olivier Lemarchand

IPC: G06F1/3231 ,  G06F1/3234 ,  G01S13/08

CPC classification number: G06F1/3231 ,  G06F1/3265 ,  G01S13/08

Abstract: A method for operating an electronic device includes while a display is in low power mode, detecting based on data collected by a time of flight (ToF) sensor, a movable object within a field of view of the electronic device; in response to the detecting initiating a period of detection having a plurality of frames, the period of detection being a time period over which a distance value indicative of a distance between the movable object and the display is detected; for each of the plurality of frames, changing the distance value to reflect whether the movable object is moving near or further from the electronic device; detecting that the distance value after the period of detection is less than a threshold distance value indicative of the movable object approaching the display; if the distance value is less than the threshold distance value, waking up the display.

公开(公告)号：US11808063B2

公开(公告)日：2023-11-07

申请号：US18178201

申请日：2023-03-03

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： Williamson Sy ,  Emiliano Mario Piccinelli ,  Keith Walters

IPC: E05B81/90 ,  E05B77/54 ,  E05B81/46 ,  E05B81/56 ,  E05B81/80 ,  B60R25/24 ,  E05B77/02

CPC classification number: E05B81/90 ,  E05B77/54 ,  E05B81/46 ,  E05B81/56 ,  E05B81/80 ,  B60R25/24 ,  E05B77/02 ,  E05Y2900/531

Abstract: A method and device for unlatching a door from a frame, using a keyless door latch system, is provided. In one embodiment, a secondary unlocking component receives a signal and derives power from the signal to provide a power source for the keyless door latch system. A microcontroller generates a control signal and an actuator, in response to receiving the control signal, actuates the secondary unlocking component, which allows an energy source, from an exterior of the door, to be transferred to the keyless door latch system for the unlatching of the door.