公开(公告)号：US5831378A

公开(公告)日：1998-11-03

申请号：US918766

申请日：1997-08-25

Applicant: J. Brett Rolfson ,  Kevin Tjaden

Inventor： J. Brett Rolfson ,  Kevin Tjaden

IPC: H01J9/02 ,  H01L21/3105 ,  H01J1/16 ,  H01J1/02 ,  H01J1/62 ,  H01J19/10

CPC classification number: H01L21/31053 ,  H01J9/025 ,  H01J2201/30426 ,  H01J2201/319 ,  H01J2209/0226

Abstract: A field emitter display having reduced surface leakage comprising at least one emitter tip surrounded by a dielectric region. The dielectric region is formed of a composite of insulative layers, at least one of which has fins extending toward the emitter tip. A conductive gate, for extracting electrons from the emitter tip, is disposed superjacent the dielectric region. The fins increase the length of the path that leaked electrical charge travels before impacting the gate.

Abstract translation: 具有减小的表面泄漏的场发射器显示器包括由电介质区域包围的至少一个发射极尖端。 电介质区域由绝缘层的复合体形成，其中至少一个具有朝向发射极尖端延伸的翅片。 用于从发射极尖端提取电子的导电栅极设置在电介质区域的上方。 在撞击门之前，翅片增加了泄漏电荷行进路径的长度。

公开(公告)号：US5825122A

公开(公告)日：1998-10-20

申请号：US619704

申请日：1996-03-26

Applicant: Evgeny Invievich Givargizov ,  Viktor Vladimirovich Zhirnov ,  Alla Nikolaevna Stepanova ,  Lidiya Nikolaevna Obolenskaya

Inventor： Evgeny Invievich Givargizov ,  Viktor Vladimirovich Zhirnov ,  Alla Nikolaevna Stepanova ,  Lidiya Nikolaevna Obolenskaya

IPC: H01J31/12 ,  H01J1/304 ,  H01J19/24 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2329/00

Abstract: A matrix field-emission cathode (5) comprises a monocrystalline silicon substrate (7) on which are arranged epitaxially grown pointed silicon emitters (1) which also act as ballast resistors connected in series to the emitters. In an advantageous embodiment of the proposed cathode, for a radius of curvature (r) at the emitter tip not exceeding 10 nm, the ratio of the height (h) of the emitter to the radius (r) is not less than 1000, while the ratio of height (h) to the diameter (D) at the emitter base is not less than 1. The angle .alpha. at the emitter tip does not exceed 30.degree.. The specific resistance of the emitter material is chosen so as to ensure that the resistance of each emitter will be comparable with the resistance between the cathode and the opposing electrode. The proposed cathode is used in an electronic device for displaying information which also has an anode (3) in the form of a strip (11) of phosphorescent material (10) and a conducting layer (9) whose projection onto the cathode (5) is perpendicular to the conducting paths (6) on the cathode; the anode itself acts as the control electrode.

Abstract translation: PCT No.PCT / RU95 / 00154 Sec。 371日期1997年3月26日 102（e）1997年3月26日PCT PCT 1995年7月18日PCT公布。 公开号WO96 / 03762 日期1996年2月8日A矩阵场致发射阴极（5）包括单晶硅衬底（7），其上布置有外延生长的尖晶硅发射体（1），其也用作与放射器串联连接的镇流电阻器。 在所提出的阴极的有利实施例中，对于发射极尖端处的曲率半径（r）不超过10nm，发射器的高度（h）与半径（r）之比不小于1000，而 发射极底部的高度（h）与直径（D）的比值不小于1.发射极尖端的角度α不超过30°。 选择发射极材料的电阻率，以确保每个发射极的电阻与阴极和相对电极之间的电阻相当。 所提出的阴极用于显示信息的电子设备中，该电子设备还具有磷光材料条带（11）形式的阳极（3）和在阴极（5）上投影的导电层（9） 垂直于阴极上的导电路径（6）; 阳极本身用作控制电极。

公开(公告)号：US5801477A

公开(公告)日：1998-09-01

申请号：US383410

申请日：1995-01-31

Applicant: John M. Macaulay

Inventor： John M. Macaulay

IPC: H01J1/30 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J29/04 ,  H01J31/12 ,  H01J1/02

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: A gated filament structure for a field emission display includes a plurality of filaments. Included is a substrate, an insulating layer positioned adjacent to the substrate, and a metal gate layer position adjacent to the insulating layer. The metal gate layer has a plurality of gates, the metal gate layer having an average thickness "s" and a top metal gate layer planar surface that is substantially parallel to a bottom metal gate layer planar surface. The metal gate layer includes a plurality of apertures extending through the gates. Each aperture has an average width "r" along a bottom planar surface of the aperture. Each aperture defines a midpoint plane positioned parallel to and equally distant from the top metal gate layer planar surface and the bottom metal gate layer planar surface. A plurality of filaments are individually positioned in an aperture. Each filament has a filament axis. The intersection of the filament axis and the midpoint plane defines a point "O". Each filament includes a filament tip terminating at a point "A". A majority of all filament tips of the display have a length "L" between each filament tip at point A and point O along the filament axis where, L.ltoreq.(s+r)/2.

Abstract translation: 用于场致发射显示器的门控灯丝结构包括多个灯丝。 包括衬底，邻近衬底定位的绝缘层以及与绝缘层相邻的金属栅极层位置。 金属栅极层具有多个栅极，金属栅极层具有平均厚度“s”以及基本上平行于底部金属栅极层平面的顶部金属栅极层平坦表面。 金属栅极层包括延伸通过栅极的多个孔。 每个孔具有沿着孔的底部平坦表面的平均宽度“r”。 每个孔限定平行于并等距离顶部金属栅极层平面和底部金属栅极层平面的中点平面。 多个细丝单独地定位在孔中。 每根灯丝都有一个灯丝轴线。 灯丝轴和中点平面的交点定义点“O”。 每个细丝包括终止于“A”点的细丝末端。 显示器的所有灯丝尖端的大部分在点A处的每个灯丝尖端和灯丝轴线处的点O之间具有长度“L”，其中L i =（s + r）/ 2。

公开(公告)号：US5772485A

公开(公告)日：1998-06-30

申请号：US821128

申请日：1997-03-20

Applicant: Shin-Puu Jeng ,  Bruce E. Gnade

Inventor： Shin-Puu Jeng ,  Bruce E. Gnade

IPC: C01B3/02 ,  H01J1/304 ,  H01J9/02 ,  H01J29/94 ,  H01J9/00 ,  C01B3/00 ,  H01J9/38 ,  H01J19/24

CPC classification number: H01J1/3042 ,  C01B3/02 ,  H01J29/94 ,  H01J9/025 ,  H01J2201/319 ,  H01J2329/00

Abstract: An emitter structure 12 for use in a field emission display device comprises a ballast layer 17 overlying an electrically conductive coating 16 (cathode electrode), which is itself formed on an electrically insulating substrate 18. A gate electrode comprises a coating of an electrically conductive material 22 which is deposited on an insulating layer 20. Cone-shaped microtips 14 formed within apertures 34 through conductive layer 22 and insulating layer 20. In the present invention, insulating layer 20 comprises a dielectric material capable of desorbing at least ten atomic percent hydrogen, which may illustratively comprise hydrogen silsesquioxane (HSQ). HSQ is an abundant source of hydrogen which keeps deleterious oxides from forming on microtip emitters 14. HSQ also reduces the capacitance formed by cathode electrode 16 and gate electrode 22, since its relative dielectric constant is less than 3.5. In alternative embodiments, the gate insulation layer 20 additionally includes one or more sublayers of a more dense insulating material 20b and 20c, typically a plasma deposited silicon dioxide.

Abstract translation: 用于场致发射显示装置的发射极结构12包括覆盖在导电涂层16（阴极电极）上的压载层17，其本身形成在电绝缘基板18上。栅电极包括导电材料 沉积在绝缘层20上的锥形微尖头14形成在孔34内，通过导电层22和绝缘层20.在本发明中，绝缘层20包括能够解吸至少十个原子百分比的氢的电介质材料， 其可以说明性地包含氢倍半硅氧烷（HSQ）。 HSQ是丰富的氢源，其在微尖端发射体14上保持有害氧化物的形成。由于其相对介电常数小于3.5，所以HSQ还降低了由阴极电极16和栅电极22形成的电容。 在替代实施例中，栅极绝缘层20另外包括一个或多个更致密的绝缘材料20b和20c的子层，通常为等离子体沉积的二氧化硅。

公开(公告)号：US5717279A

公开(公告)日：1998-02-10

申请号：US607465

申请日：1996-02-27

Applicant: Hironori Imura

Inventor： Hironori Imura

IPC: H01J1/304 ,  B81B1/00 ,  H01J3/02 ,  H01J1/30 ,  H01J19/24

CPC classification number: H01J3/022 ,  H01J2201/319

Abstract: A field emission cold cathode includes a conductive substrate (1), an insulating layer (2) disposed on the substrate (1), a gate electrode (3) disposed on the insulating layer (2), cavities (4) extending through the gate electrode (3) and the insulating layer (2), and emitter cones (6) disposed on the substrate (1) within the cavities (4). The gate electrode further includes high resistance areas (5) disposed around the tips of the emitter cones (6) that enables the field emission cold cathode to operate in the event of a short circuit between the gate electrode (3) and an emitter cone (6) due to electrically conductive foreign material entering a cavity (4). The field emission cold cathode can be use in an electron gun.

Abstract translation: 场致发射冷阴极包括导电基板（1），设置在基板（1）上的绝缘层（2），设置在绝缘层（2）上的栅电极（3），延伸穿过栅极 电极（3）和绝缘层（2）以及设置在空腔（4）内的基板（1）上的发射极（6）。 栅电极还包括围绕发射极（6）的尖端设置的高电阻区域（5），其使得场致发射冷阴极能够在栅极（3）和发射极锥体（3）之间发生短路的情况下操作 6）由于导电异物进入空腔（4）。 场致发射冷阴极可用于电子枪。

公开(公告)号：US5669801A

公开(公告)日：1997-09-23

申请号：US535505

申请日：1995-09-28

Applicant: Edward C. Lee

Inventor： Edward C. Lee

IPC: H01J9/02

CPC classification number: H01J9/025 ,  H01J2201/319

Abstract: A microtip of a field emission device cathode (10) may be fabricated by forming a dielectric layer (18) on an upper surface of a resistive layer (16). A gate layer (20) is formed on the dielectric layer (18). An opening is formed in the gate layer (20) and a microtip cavity (28) is formed in the dielectric layer (18). The microtip cavity (28) extends through the opening in the gate layer (20) to the resistive layer (16). Layers of metal are formed on the gate layer (20) and the resistive layer (16) such that a microtip (30) is formed within the microtip cavity (28). Finally, polishing is performed to remove a portion of the overburden or layers of metal on the gate layer (20). The polishing continues until the microtip (30) is exposed.

Abstract translation: 可以通过在电阻层（16）的上表面上形成介电层（18）来制造场发射器件阴极（10）的微尖端。 在电介质层（18）上形成栅极层（20）。 在栅极层（20）中形成开口，在电介质层（18）中形成微尖端腔（28）。 微尖端腔（28）延伸穿过栅极层（20）中的开口至电阻层（16）。 在栅极层（20）和电阻层（16）上形成金属层，使得在微尖端腔（28）内形成微尖端（30）。 最后，进行抛光以去除栅极层（20）上的一部分上覆层或金属层。 抛光继续，直到微尖端（30）暴露。

公开(公告)号：US5665421A

公开(公告)日：1997-09-09

申请号：US725941

申请日：1996-10-08

Applicant: David L. Bergeron ,  John M. Macaulay ,  Roger W. Barton ,  Jeffrey D. Morse

Inventor： David L. Bergeron ,  John M. Macaulay ,  Roger W. Barton ,  Jeffrey D. Morse

IPC: H01J3/02 ,  H01J9/02 ,  B05D5/12

CPC classification number: B82Y10/00 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/319

Abstract: A method is provided for creating gated filament structures for a field emission display. A multi-layer structure is provided that includes a substrate, an insulating layer, a metal gate layer positioned on a top surface of the insulating layer and a gate encapsulation layer positioned on a top surface of the metal gate layer. A plurality of gates are provided and define a plurality of apertures on the top of the insulating layer. A plurality of spacers are formed in the apertures at their edges on the top surface of the insulating layer. The spacers are used as masks for etching the insulating layer and form a plurality of pores in the insulating layer. The pores are plated with a filament material to create a plurality of filaments. The pores can be overplated to create the plurality of filaments. The filaments are vertically self-aligned in the pores.

Abstract translation: 提供了一种用于产生用于场致发射显示器的门控灯丝结构的方法。 提供了一种多层结构，其包括基板，绝缘层，位于绝缘层的顶表面上的金属栅极层和位于金属栅极层顶表面上的栅极封装层。 提供多个栅极并且在绝缘层的顶部上限定多个孔。 在绝缘层的顶表面上的边缘处的孔中形成多个间隔物。 间隔物用作蚀刻绝缘层并在绝缘层中形成多个孔的掩模。 用细丝材料电镀细孔以产生多根长丝。 孔可以被过度铺展以产生多根细丝。 细丝在孔中垂直自对准。

公开(公告)号：US5647785A

公开(公告)日：1997-07-15

申请号：US527520

申请日：1995-09-13

Applicant: Gary Wayne Jones ,  Ching-Tzong Sune

Inventor： Gary Wayne Jones ,  Ching-Tzong Sune

IPC: H01J1/304 ,  H01J9/02 ,  H01J29/04 ,  H01J29/87 ,  H01J31/12 ,  H01J1/30

CPC classification number: H01J3/021 ,  H01J1/3042 ,  H01J9/025 ,  H01J2201/319

Abstract: A vertical microelectronic field emitter is formed by first forming tips on the face of a substrate and then forming trenches in the substrate around the tips to form columns in the substrate, with the tips lying on top of the columns. The trenches are filled with a dielectric and a conductor layer is formed on the dielectric. Alternatively, trenches may be formed in the face of the substrate with the trenches defining columns in the substrate. Then, tips are formed on top of the columns. The trenches are filled with dielectric and the conductor layer is formed on the dielectric to form the extraction electrodes.

Abstract translation: 通过在衬底的表面上首先形成尖端然后在衬底周围形成尖端的沟槽以在衬底中形成柱，其中尖端位于柱的顶部上，形成垂直微电子场发射器。 沟槽填充有电介质，并且在电介质上形成导体层。 或者，可以在衬底的表面形成沟槽，其中沟槽限定在衬底中的列。 然后，尖端形成在列的顶部。 沟槽用电介质填充，并且导体层形成在电介质上以形成提取电极。

公开(公告)号：US5642017A

公开(公告)日：1997-06-24

申请号：US284762

申请日：1994-08-02

Applicant: Glen E. Hush

Inventor： Glen E. Hush

IPC: G09G3/20 ,  G09G3/22 ,  H01J17/36 ,  H05B41/36

CPC classification number: B82Y10/00 ,  G09G3/22 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319

Abstract: This invention is a space-efficient pixel control circuit for a field emission flat panel matrix-addressable array display. The invention reduces by one the number of transistors required at the intersection of each row line and column line within the array. In addition, only two lines need be routed through the array (i.e., row and column). The array space saved by increased layout efficiency may be used to increase pixel density within the array. The new space-efficient pixel control circuit has a single transistor in a base electrode grounding path that is directly controlled by a row line. A current-limiting resistor is interposed between the single grounding transistor and a column line to which an inverse video signal is applied. The magnitude of the current through the current-limiting resistor is inversely proportional to the inverse column signal voltage. Thus, pixel brightness is directly proportional to the voltage drop across the current-limiting resistor.

Abstract translation: 本发明是用于场发射平板矩阵寻址阵列显示器的节省空间的像素控制电路。 本发明将阵列内的每行行和列线的交叉点所需的晶体管数减少一个。 另外，只有两条线需要通过阵列（即行和列）路由。 通过增加布局效率节省的阵列空间可用于增加阵列内的像素密度。 新的节省空间的像素控制电路在基极电极接地路径中具有由行线直接控制的单个晶体管。 在单个接地晶体管和施加反向视频信号的列线之间插入限流电阻。 通过限流电阻的电流的大小与反向列信号电压成反比。 因此，像素亮度与限流电阻两端的压降成正比。

公开(公告)号：US5628659A

公开(公告)日：1997-05-13

申请号：US427464

申请日：1995-04-24

Applicant: Chenggang Xie ,  Nalin Kumar ,  Howard K. Schmidt

Inventor： Chenggang Xie ,  Nalin Kumar ,  Howard K. Schmidt

IPC: H01J9/02 ,  H01J1/30 ,  H01J9/42

CPC classification number: H01J9/025 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319

Abstract: A system and method is available for fabricating a field emitter device, where in an emitter material, such as copper, is deposited over a resistive layer which has been deposited upon a substrate. Two ion beam sources are utilized. The first ion beam source is directed at a target material, such as molybdenum, for sputtering molybdenum onto the emitter material. The second ion beam source is utilized to etch the emitter material to produce cones or micro-tips. A low work function material, such as amorphous diamond, is then deposited over the micro-tips.

Abstract translation: 一种系统和方法可用于制造场致发射器件，其中发射极材料（例如铜）沉积在已沉积在衬底上的电阻层上。 使用两个离子束源。 第一离子束源指向诸如钼的靶材料，用于将钼溅射到发射极材料上。 第二离子束源用于蚀刻发射体材料以产生锥体或微尖端。 然后将诸如无定形金刚石的低功函数材料沉积在微尖端上。