PARTIAL BAND RECONSTRUCTION OF FREQUENCY CHANNELIZED FILTERS
    252.
    发明申请
    PARTIAL BAND RECONSTRUCTION OF FREQUENCY CHANNELIZED FILTERS 审中-公开
    频段通道滤波器的部分重构

    公开(公告)号:WO2004023781A2

    公开(公告)日:2004-03-18

    申请号:PCT/US2003/021253

    申请日:2003-07-08

    IPC: H04N

    CPC classification number: H04B1/001 H03H17/0266 H04B1/0003 H04B1/406

    Abstract: A channelized filter design for partial band reconstruction having high dynamic range requirements. The analysis filter and synthesis filter constraints of the present invention permit high performance signal detection with an alias free signal recombination capability for signals that span multiple frequency bins. The filter bank allows the use of a single wideband asset to provide for data channelized for detection processing with the ability to recombine one or more adjacent frequency bins into a wider bandwidth baseband time domain data stream suitable for exploitation processing. The present implementation allows the use of an efficient partial band reconstruction mechanism that allows signal reconstruction using only the frequency subchannels that pertain to the signal of interest that is to be copied. The filter design mechanism separates the specification of the analysis filter to support signal detection in environments of high dynamic range. The signal reconstruction (synthesis) filter uses fewer bins and allows a higher order filter.

    Abstract translation: 用于部分频带重建的信道化滤波器设计,具有高动态范围要求。 本发明的分析滤波器和合成滤波器约束允许用于跨越多个频率仓的信号的无混叠信号复合能力的高性能信号检测。 滤波器组允许使用单个宽带资产来提供用于检测处理的数据,其具有将一个或多个相邻频率仓重新组合到适用于开发处理的更宽带宽基带时域数据流中的能力。 本实施例允许使用有效的部分频带重建机制,其允许仅使用与要复制的感兴趣信号相关的频率子信道的信号重建。 滤波器设计机制将分析滤波器的规格分离,以支持高动态范围环境下的信号检测。 信号重建(合成)滤波器使用较少的存储区并允许更高阶的滤波器。

    POWER AND CONFIDENCE ORDERED LOW COMPLEXITY SOFT TURBOMUD WITH VOTING SYSTEM
    254.
    发明申请
    POWER AND CONFIDENCE ORDERED LOW COMPLEXITY SOFT TURBOMUD WITH VOTING SYSTEM 审中-公开
    功率和信心低廉的复杂软件涡轮机与投票系统

    公开(公告)号:WO2004012341A1

    公开(公告)日:2004-02-05

    申请号:PCT/US2003/015503

    申请日:2003-05-14

    Abstract: A real-time multi-user detection (MUD) receiver processing simultaneous digitally modulated interferers and transmissions in the same frequency optimizing performance for heavily loaded and overloaded multiple access systems implementing an iterative TurboMUD receiver using tree-pruning, including confidence ordering, power-ordering, and a voting procedure (330). On the first iteration, user indices are ordered according to received powers. On subsequent iterations, the voting system provides soft decisions or confidence values utilized as soft inputs to single-user decoders (340). Voting (330) is computationally attractive and allows the bank of decoders to operate on soft values, improving performance and reducing the number of turboMUD iterations. The bank of soft output error correction decoders produces an improved set of soft decisions or confidence values corresponding to the channel bits transmitted by each interfering user. Confidence values from the bank of decoders are used to order user indices, allowing the tree pruned MUD detector (320) to operate on the most reliable symbols first, improving the likelihood that pruning is correct. Subsequent confidence ordering and estimate refinement occurs until conditions are satisfied and iterative processing completed.

    Abstract translation: 实时多用户检测(MUD)接收机处理同时数字调制的干扰信号和传输,以相同的频率优化性能,用于使用树修剪(包括置信排序,功率排序)实现迭代式TurboMUD接收机的重负载和过载的多址系统 和一个投票程序(330)。 在第一次迭代中,用户索引根据接收的功率进行排序。 在随后的迭代中,投票系统提供用作单用户解码器的软输入的软判决或置信度值(340)。 投票(330)在计算上是有吸引力的,并且允许解码器组以软值操作,提高性能并减少turboMUD迭代的数量。 软输出纠错解码器组产生对应于每个干扰用户发送的信道位的改进的一组软判决或置信度值。 来自解码器组的置信度值用于对用户索引进行排序,允许树剪枝MUD检测器(320)首先对最可靠的符号进行操作,从而提高修剪正确的可能性。 随后的置信排序和估计细化发生,直到满足条件并且迭代处理完成。

    SYSTEM FOR PEAK DETECTION AMONG MULTIPLE SIGNALS

    公开(公告)号:WO2003058860A3

    公开(公告)日:2003-07-17

    申请号:PCT/US2002/041746

    申请日:2002-12-31

    Abstract: Digital peak detection among multiple signals, or inputs. In one embodiment, a detection method that includes receiving multiple digitized input signals (101). For each digitized input signal, the method also includes noting a first data value associated with the digitized input signal at a first time. The method includes comparing the first data values to determine a largest first data value from among the first data values. For each digitized input signal, the method includes noting a second data value associated with the digitized input signal at a second time. The method includes comparing the second data values to determine a largest second data value from among the second data values. The method includes comparing the largest second data value with a threshold data value. The method includes detecting a peak when the largest second data value is greater than the threshold data value, and less than the largest first data value. In other embodiments, devices that includes a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC) that is configured to perform at least the steps of this detection method. That is, the FPGA or the ASIC can be provided with logic, or programming, that can be utilized in performing the steps of this detection method.

    ACOUSTICAL ARRAY WITH MULTILAYER SUBSTRATE INTEGRATED CIRCUITS

    公开(公告)号:WO2003001571A3

    公开(公告)日:2003-01-03

    申请号:PCT/US2002/007596

    申请日:2002-03-08

    Abstract: A high density, exceptionally complex and compact ultrasound transducer array (30) using multi-layer structures composed of active integrated circuit devices on various substrates (400, 402, 404, 406) and passive devices. Electrically conducting interconnections between substrates are implemented with micro-vias (408) configured with conductors extending through the substrates, permitting the use of divided or different integrated circuit technologies arranged and/or isolated within different integrated circuit substrates or layers of the ultrasound transducer assembly. The various layers may be assembled with solders of respectively lower reflow temperatures, to permit testing of selected layers and circuits prior to completion.

    INTEGRATED CIRCUIT WITH PROGRAMMABLE RADIATION TOLERANCE

    公开(公告)号:WO2023027794A2

    公开(公告)日:2023-03-02

    申请号:PCT/US2022/032347

    申请日:2022-06-06

    Abstract: An integrated circuit (IC) that is otherwise radiation tolerant implements a radiation tolerance limiting feature (RTLF) to ensure that the IC, as manufactured, will fail applicable radiation tolerance tests, thereby allowing it to be manufactured by any suitable IC foundry. Embodiments further include a programmable radiation tolerance feature (PRT) that can be actuated at an authorized actuation site after IC manufacture to override the RTLF, thereby rendering the IC radiation tolerant. The PRT and/or RTLF can include redundancy to ensure reliability. The PRT and/or RTLF can be obfuscated, encrypted, and/or password protected. Actuating the PRT can include applying a programming signal to the IC and/or uploading code to a programmable element after IC manufacture. A plurality of RTLFs can be included to ensure failure of any desired combination of applicable radiation tolerance tests, such as total radiation dosage, linear energy transfer events, radiation dose rate, and single event upset.

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