Abstract:
An imaging system comprising a lens, a detector array (e.g., focal plane array), a signal processing module and a shutter, wherein the shutter is positioned in front of the lens (between the lens and the scene being imaged). This front lens shutter mount configuration allows offset correction to compensate for internal radiant flux and other deficiencies associated with conventional systems.
Abstract:
A channelized filter design for partial band reconstruction having high dynamic range requirements. The analysis filter and synthesis filter constraints of the present invention permit high performance signal detection with an alias free signal recombination capability for signals that span multiple frequency bins. The filter bank allows the use of a single wideband asset to provide for data channelized for detection processing with the ability to recombine one or more adjacent frequency bins into a wider bandwidth baseband time domain data stream suitable for exploitation processing. The present implementation allows the use of an efficient partial band reconstruction mechanism that allows signal reconstruction using only the frequency subchannels that pertain to the signal of interest that is to be copied. The filter design mechanism separates the specification of the analysis filter to support signal detection in environments of high dynamic range. The signal reconstruction (synthesis) filter uses fewer bins and allows a higher order filter.
Abstract:
A layered mechanism for integrating programmable devices into software based frameworks for distributed processing wherein the software framework interfaces with an adaptation layer, which in turn interfaces with a programmable device, such as a field programmable gate array (FPGA). The adaptation layer specifies and enforces compatible electrical, physical and logical interfaces between the programmable device and the software-based framework of which the device, the application running on it, and the adaptation layer form a component.
Abstract:
A real-time multi-user detection (MUD) receiver processing simultaneous digitally modulated interferers and transmissions in the same frequency optimizing performance for heavily loaded and overloaded multiple access systems implementing an iterative TurboMUD receiver using tree-pruning, including confidence ordering, power-ordering, and a voting procedure (330). On the first iteration, user indices are ordered according to received powers. On subsequent iterations, the voting system provides soft decisions or confidence values utilized as soft inputs to single-user decoders (340). Voting (330) is computationally attractive and allows the bank of decoders to operate on soft values, improving performance and reducing the number of turboMUD iterations. The bank of soft output error correction decoders produces an improved set of soft decisions or confidence values corresponding to the channel bits transmitted by each interfering user. Confidence values from the bank of decoders are used to order user indices, allowing the tree pruned MUD detector (320) to operate on the most reliable symbols first, improving the likelihood that pruning is correct. Subsequent confidence ordering and estimate refinement occurs until conditions are satisfied and iterative processing completed.
Abstract:
A digital receiver (10) automatically detects and non-coherently demodulates a multiplicity of interfering digitally modulated signals transmitted simultaneously at approximately the same carrier frequency. The receiver (10) includes one or more antenna inputs (e.g., polarization and/or space diverse) (13), a parameter estimator module (20), and a multiuser detector (18) for estimating the data transmitted by each interfering signals and adapted to operate with at least one of a MUD algorithm with partially quantized prior information and a MUD algorithm based on prewhitened data.
Abstract:
A method for stacking chips within a multichip module package is disclosed. A first chip is bonded to a substrate. A passivation layer is then deposited on a top surface of the first chip. After a first adhesive layer has been deposited on top of the passivation layer, an interposer is placed on the adhesive layer. Next, a second adhesive layer is deposited on the interposer. Finally, a second chip is bonded to the interposer via the second adhesive layer.
Abstract:
Digital peak detection among multiple signals, or inputs. In one embodiment, a detection method that includes receiving multiple digitized input signals (101). For each digitized input signal, the method also includes noting a first data value associated with the digitized input signal at a first time. The method includes comparing the first data values to determine a largest first data value from among the first data values. For each digitized input signal, the method includes noting a second data value associated with the digitized input signal at a second time. The method includes comparing the second data values to determine a largest second data value from among the second data values. The method includes comparing the largest second data value with a threshold data value. The method includes detecting a peak when the largest second data value is greater than the threshold data value, and less than the largest first data value. In other embodiments, devices that includes a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC) that is configured to perform at least the steps of this detection method. That is, the FPGA or the ASIC can be provided with logic, or programming, that can be utilized in performing the steps of this detection method.
Abstract:
A towing cable (30) is initially wrapped around a spindle (32). A translating lick or bale (34) translates in the direction of the double-ended arrow (36) driven by a double helix drive (38) which is mechanically coupled to a transmission (40). The double helix drive (38) revolves at a speed determined by the rotation of the spindle (32) such that cable (30) is either wound or unwound along the spindle (32). Signals are passed over a signal line (50).
Abstract:
A high density, exceptionally complex and compact ultrasound transducer array (30) using multi-layer structures composed of active integrated circuit devices on various substrates (400, 402, 404, 406) and passive devices. Electrically conducting interconnections between substrates are implemented with micro-vias (408) configured with conductors extending through the substrates, permitting the use of divided or different integrated circuit technologies arranged and/or isolated within different integrated circuit substrates or layers of the ultrasound transducer assembly. The various layers may be assembled with solders of respectively lower reflow temperatures, to permit testing of selected layers and circuits prior to completion.
Abstract:
An integrated circuit (IC) that is otherwise radiation tolerant implements a radiation tolerance limiting feature (RTLF) to ensure that the IC, as manufactured, will fail applicable radiation tolerance tests, thereby allowing it to be manufactured by any suitable IC foundry. Embodiments further include a programmable radiation tolerance feature (PRT) that can be actuated at an authorized actuation site after IC manufacture to override the RTLF, thereby rendering the IC radiation tolerant. The PRT and/or RTLF can include redundancy to ensure reliability. The PRT and/or RTLF can be obfuscated, encrypted, and/or password protected. Actuating the PRT can include applying a programming signal to the IC and/or uploading code to a programmable element after IC manufacture. A plurality of RTLFs can be included to ensure failure of any desired combination of applicable radiation tolerance tests, such as total radiation dosage, linear energy transfer events, radiation dose rate, and single event upset.