公开(公告)号：EP1085410A3

公开(公告)日：2001-11-14

申请号：EP00307544.7

申请日：2000-09-01

Applicant: STMicroelectronics, Ltd.

Inventor： Shann, Richard

IPC: G06F9/445

CPC classification number: G06F8/54

Abstract: An executable program is prepared from a plurality of object code modules, at least one of the object code modules including section data specifying a plurality of code sequences each associated with relocation instructions identifying condition parameters. The executable program is prepared by reading the relocation instructions and determining for each condition parameter whether or not the condition specified for that parameter is satisfied and on the basis of that determination, selecting only one of the code sequences for inclusion in the executable program. A linker for preparing the executable program includes a stack, a relocation module for reading the relocations and carrying out the relocation operations, the relocation module being responsive to a value recalled from the stack to select one of the code sequences in dependence on the value, a section data module for holding section data which is subject to the relocation operations and a program forming a module for preparing executable programs. The linker may be controlled by a computer program in the form of one of the object code modules. Also disclosed is a method of assembling an object code module such that the assembled object code module includes the conditional code sequences.

Abstract translation: 从多个目标代码模块准备可执行程序，至少一个目标代码模块包括指定多个代码序列的部分数据，每个代码序列与识别条件参数的重新定位指令相关联。 通过读取重定位指令并且针对每个条件参数确定是否满足为该参数指定的条件并且基于该确定来选择仅包括在可执行程序中的一个代码序列来准备可执行程序。 用于准备可执行程序的链接器包括堆栈，用于读取重定位并执行重定位操作的重定位模块，重定位模块响应于从堆栈中调用的值来依据该值选择代码序列中的一个， 保存经过重新定位操作的部分数据的部分数据模块和形成用于准备可执行程序的模块的程序。 链接器可以由目标代码模块之一的形式的计算机程序来控制。 还公开了一种组装目标代码模块的方法，使得组装的目标代码模块包括条件代码序列。

公开(公告)号：EP1026826A3

公开(公告)日：2000-08-30

申请号：EP99310180.7

申请日：1999-12-17

Applicant: Stmicroelectronics, Ltd.

Inventor： Barnes, William

IPC: H03K5/24

CPC classification number: H03K5/249 ,  H03K3/356139 ,  H03K5/2481

Abstract: A comparator circuit with comparing means for comparing first and second voltages, has current source circuitry for providing current to said comparing means, said current source circuitry having an input for receiving a clock signal having first and second states, whereby the comparing means starts to compare the first and second voltages when the clock signal makes a transition from the first state to the second state; and means for determining when said comparing means has completed a comparison of said first and second voltages and for switching off said current source circuitry and hence said comparing means when said comparison has been completed.