公开(公告)号：US06238983B1

公开(公告)日：2001-05-29

申请号：US09385521

申请日：1999-08-30

Applicant: Cheng-Yu Chu ,  Jenq-Dong Sheu ,  Dean E. Lin ,  Yi-Jing Chu

Inventor： Cheng-Yu Chu ,  Jenq-Dong Sheu ,  Dean E. Lin ,  Yi-Jing Chu

IPC: H01L218246

CPC classification number: H01L27/1126

Abstract: A metal code process for a read-only memory (ROM) combines the alignment dip back process (to reduce the polyoxide thickness over the gate electrode and to protect the field oxide) with a double charge implant approach to provide the function of a depletion mode ROM cell. The alignment dip back process also avoids leakage current problems. A stable depletion mode device character is achieved by implant step energies greater than 150 keV.

Abstract translation: 用于只读存储器（ROM）的金属代码处理将双向电荷注入方法组合到对准反向处理（以减小栅电极上的多晶氧化物厚度并保护场氧化物），以提供耗尽模式的功能 ROM单元。 对准回退过程也避免了漏电流问题。 通过大于150keV的注入步进能量实现稳定的耗尽模式器件特性。

公开(公告)号：US06765277B2

公开(公告)日：2004-07-20

申请号：US10050300

申请日：2002-01-15

Applicant: Yen-Ming Chen ,  Chia-Fu Lin ,  Yang-Tung Fan ,  Hong-Wen Huang ,  Cheng-Yu Chu

Inventor： Yen-Ming Chen ,  Chia-Fu Lin ,  Yang-Tung Fan ,  Hong-Wen Huang ,  Cheng-Yu Chu

IPC: H01L3100

CPC classification number: H01L24/48 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L27/14621 ,  H01L27/14685 ,  H01L31/02161 ,  H01L31/02162 ,  H01L31/02327 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05556 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Within a method for fabricating a microelectronic, and a microelectronic fabrication fabricated in accord with the method, there is formed upon a bond pad formed over a substrate a conductor passivation layer. Within the method and the microelectronic fabrication, the bond pad is formed from a conductor material selected from the group consisting of aluminum and aluminum alloy conductor materials, and the conductor passivation layer is formed from a noble metal conductor material. The invention provides particular value for fabricating color filter sensor image array optoelectronic microelectronic fabrications with attenuated bond pad corrosion.

Abstract translation: 在制造微电子的方法和根据该方法制造的微电子制造中，形成在衬底上形成导体钝化层的接合焊盘。 在该方法和微电子制造中，接合焊盘由选自铝和铝合金导体材料的导体材料形成，并且导体钝化层由贵金属导体材料形成。 本发明为制造具有减弱的键合垫腐蚀的滤色器传感器图像阵列光电微电子制造提供了特别的价值。

公开(公告)号：US06712260B1

公开(公告)日：2004-03-30

申请号：US10124998

申请日：2002-04-18

Applicant: Wen-Chang Kuo ,  Chia-Fu Lin ,  Sheng-Liang Pan ,  Szu-Yao Wang ,  Cheng-Yu Chu

Inventor： Wen-Chang Kuo ,  Chia-Fu Lin ,  Sheng-Liang Pan ,  Szu-Yao Wang ,  Cheng-Yu Chu

IPC: B23K3102

CPC classification number: B23K35/38 ,  B23K1/0016 ,  B23K1/206 ,  B23K2101/40 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/3457 ,  H05K2203/0315 ,  H05K2203/043 ,  H05K2203/095 ,  H01L2224/05099

Abstract: A method of forming reflowed bumps comprising the following sequential steps. A wafer is provided. A series of spaced initial bumps is formed upon the wafer. The initial bumps having exposed side walls and top surfaces and organic residue over the initial bump side walls and/or the initial bump top surfaces. The organic residue is simultaneously removed from the initial bump side walls and top surfaces with the forming a surface oxide layer over the initial bump side walls and top surfaces. The surface oxide layer is stripped from the initial bump top surfaces and an upper portion of the initial bump side walls to form partially exposed bumps. The partially exposed bumps are heat treated to melt the partially exposed bumps to form the reflowed bumps.

Abstract translation: 一种形成回流凸块的方法，包括以下顺序步骤。 提供晶片。 在晶片上形成一系列间隔开的初始凸块。 初始凸起在初始凸起侧壁和/或初始凸起顶表面上具有暴露的侧壁和顶表面以及有机残余物。 有机残余物同时从初始凸块侧壁和顶表面去除，在初始凸块侧壁和顶表面上形成表面氧化层。 表面氧化物层从初始凸起顶表面和初始凸块侧壁的上部剥离以形成部分暴露的凸块。 部分暴露的凸起被热处理以熔化部分暴露的凸块以形成回流的凸块。

公开(公告)号：US06482669B1

公开(公告)日：2002-11-19

申请号：US09867379

申请日：2001-05-30

Applicant: Yang-Tung Fan ,  Chiou-Shian Peng ,  Cheng-Yu Chu ,  Shih-Jane Lin ,  Yen-Ming Chen ,  Fu-Jier Fan ,  Kuo-Wei Lin

Inventor： Yang-Tung Fan ,  Chiou-Shian Peng ,  Cheng-Yu Chu ,  Shih-Jane Lin ,  Yen-Ming Chen ,  Fu-Jier Fan ,  Kuo-Wei Lin

IPC: H01L2100

CPC classification number: H01L27/14685 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14645 ,  H01L31/02162 ,  H01L31/02327

Abstract: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.

Abstract translation: 公开了一种有序的微电子制造顺序，其中滤色器通过直角沉积直接形成在CCD，CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面，并且覆盖有高透光率平面化膜 指定的折射率和物理性质，其优化光收集到光电二极管而不需要额外的常规微透镜。 光学平坦的顶表面用于封装和保护成像仪免受化学和热清洁处理损伤，最小化形成在非平面表面上的图像的像差或引起反射损失的形貌底层变化，并避免在切割和包装期间引起的残留颗粒夹杂物 。 通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。 光电二极管阵列设置有金属遮光罩，钝化，并且在其上形成滤色器。 沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置，而不需要常规的凸起的微透镜。

公开(公告)号：US06372545B1

公开(公告)日：2002-04-16

申请号：US09814039

申请日：2001-03-22

Applicant: Fu-Jier Fan ,  Kuo-Wei Lin ,  Yen-Ming Chen ,  Cheng-Yu Chu ,  Shih-Jane Lin ,  Chiou-Shian Peng ,  Yang-Tung Fan

Inventor： Fu-Jier Fan ,  Kuo-Wei Lin ,  Yen-Ming Chen ,  Cheng-Yu Chu ,  Shih-Jane Lin ,  Chiou-Shian Peng ,  Yang-Tung Fan

IPC: H01L2144

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/19043 ,  H01L2924/00014

Abstract: A method for forming an under bump metal, comprising the following steps. A semiconductor structure is provided having an exposed I/O pad. A patterned passivation layer is formed over the semiconductor structure, the patterned passivation layer having an opening exposing a first portion of the I/O pad. A dry film resistor (DFR) layer is laminated, exposed and developed to form a patterned dry film resistor (DFR) layer over the patterned passivation layer. The patterned dry film resistor (DFR) layer having an opening exposing a second portion of the I/O pad. The patterned dry film resistor (DFR) layer opening having opposing side walls with a predetermined profile with an undercut. A metal layer is formed over the patterned dry film resistor (DFR) layer, the exposed third portion of the I/O pad, and over at least a portion of the opposing side walls of the patterned dry film resistor (DFR) layer opening. The patterned dry film resistor (DFR) layer is lifted off, along with the metal layer over patterned dry film resistor (DFR) layer and over at least the portion of the opposing side walls, leaving the metal layer over the exposed second portion of the I/O pad. The metal layer over the exposed second portion of the I/O pad being an under bump metal.

Abstract translation: 一种形成凸块下金属的方法，包括以下步骤。 提供具有暴露的I / O焊盘的半导体结构。 图案化的钝化层形成在半导体结构之上，图案化的钝化层具有暴露I / O焊盘的第一部分的开口。 将干膜电阻（DFR）层层压，曝光和显影以在图案化的钝化层上形成图案化的干膜电阻（DFR）层。 图案化的干膜电阻器（DFR）层具有露出I / O焊盘的第二部分的开口。 图案化的干膜电阻（DFR）层开口具有相对的侧壁，具有预定的具有底切的轮廓。 在图案化干膜电阻器（DFR）层，I / O焊盘的暴露的第三部分以及图案化干膜电阻器（DFR）层开口的相对侧壁的至少一部分之上形成金属层。 图案化的干膜电阻器（DFR）层与图案化的干膜电阻器（DFR）层上的金属层一起被提起并且在至少相对的侧壁的部分之上，使得金属层在暴露的第二部分 I / O焊盘。 I / O焊盘暴露的第二部分上的金属层是凸块下金属。