公开(公告)号：US08372729B1

公开(公告)日：2013-02-12

申请号：US13285928

申请日：2011-10-31

Applicant: Chuan-Cheng Cheng ,  Choy Hing Li ,  Shuhua Yu

Inventor： Chuan-Cheng Cheng ,  Choy Hing Li ,  Shuhua Yu

IPC: H01L23/48 ,  H01L23/58 ,  H01L23/485

CPC classification number: H01L23/60 ,  H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor wafer including an electrostatic discharge (ESD) protective device, and methods for fabricating the same. In one aspect, the method includes forming a first semiconductor device in a first semiconductor die region on the semiconductor wafer; forming a second semiconductor device in a second semiconductor die region on the semiconductor wafer; and forming a protective device in a scribe line region between (i) the first semiconductor die region and (ii) the second semiconductor die region.

Abstract translation: 包括静电放电（ESD）保护装置的半导体晶片及其制造方法。 一方面，该方法包括在半导体晶片上的第一半导体管芯区域中形成第一半导体器件; 在所述半导体晶片上的第二半导体管芯区域中形成第二半导体器件; 以及在（i）第一半导体管芯区域和（ii）第二半导体管芯区域之间的划线区域中形成保护器件。

公开(公告)号：US20110186992A1

公开(公告)日：2011-08-04

申请号：US13015988

申请日：2011-01-28

Applicant: Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

Inventor： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

IPC: H01L23/48 ,  H01L21/56

CPC classification number: H01L25/04 ,  H01L21/486 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/83904 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Embodiments of the present disclosure provide a method, comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that is disposed opposite to the first surface, forming one or more vias in the first surface of the semiconductor substrate, the one or more vias initially passing through only a portion of the semiconductor substrate without reaching the second surface, forming a dielectric film on the first surface of the semiconductor substrate, forming a redistribution layer on the dielectric film, the redistribution layer being electrically coupled to the one or more vias, coupling one or more dies to the redistribution layer, forming a molding compound to encapsulate at least a portion of the one or more dies, and recessing the second surface of the semiconductor substrate to expose the one or more vias. Other embodiments may be described and/or claimed.

Abstract translation: 本公开的实施例提供一种方法，包括提供半导体衬底，其具有（i）第一表面和（ii）与第一表面相对设置的第二表面，在半导体衬底的第一表面中形成一个或多个通孔 一个或多个通孔最初仅通过半导体衬底的一部分而不到达第二表面，在半导体衬底的第一表面上形成电介质膜，在电介质膜上形成再分布层，再分配层电耦合 连接到所述一个或多个通孔，将一个或多个管芯耦合到所述再分布层，形成模制化合物以封装所述一个或多个管芯的至少一部分，以及使所述半导体衬底的所述第二表面凹陷以暴露所述一个或多个通孔 。 可以描述和/或要求保护其他实施例。

公开(公告)号：US07820493B1

公开(公告)日：2010-10-26

申请号：US12012724

申请日：2008-02-04

Applicant: Chuan-Cheng Cheng ,  Shuhua Yu ,  Roawen Chen ,  Albert Wu

Inventor： Chuan-Cheng Cheng ,  Shuhua Yu ,  Roawen Chen ,  Albert Wu

IPC: H01L27/10 ,  H01L21/8239

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A fuse structure, an integrated circuit including the structure, and methods for making the structure and (re)configuring a circuit using the fuse. The fuse structure generally includes (a) a conductive structure with at least two circuit elements electrically coupled thereto, (b) a dielectric layer over the conductive structure, and (c) a first lens over both the first dielectric layer and the conductive structure configured to at least partially focus light onto the conductive structure. The method of making the structure generally includes the steps of (1) forming a conductive structure electrically coupled to first and second circuit elements, (2) forming a dielectric layer thereover, and (3) forming a lens on or over the dielectric layer and over the conductive structure, the lens being configured to at least partially focus light onto the conductive structure. The method of (re)configuring a circuit generally includes the steps of (i) irradiating at least one lens on or near a surface of the circuit sufficient to electrically disconnect a corresponding first fuse positioned under the lens and disable a first configuration of the circuit, and (ii) irradiating at least one other lens on or near the surface of the circuit sufficient to electrically disconnect a corresponding second fuse positioned under that lens and enable a second configuration of the circuit. The structure and methods advantageously provide fuse structures having improved reliability and smaller chip area, thereby increasing the yield of the manufacturing process and the numbers of die per wafer (both gross and good).

Abstract translation: 保险丝结构，包括该结构的集成电路，以及使用该保险丝的结构和（重新）配置电路的方法。 熔丝结构通常包括（a）具有至少两个电耦合到其上的电路元件的导电结构，（b）导电结构上的电介质层，和（c）第一介电层和导电结构上的第一透镜， 以至少部分地将光聚焦到导电结构上。 制造该结构的方法通常包括以下步骤：（1）形成电耦合到第一和第二电路元件的导电结构，（2）在其上形成介电层，和（3）在电介质层上或之上形成透镜， 在导电结构之上，透镜被配置为至少部分地将光聚焦到导电结构上。 （重新）配置电路的方法通常包括以下步骤：（i）在电路表面上或附近照射足够的电气断开位于透镜下方的对应的第一保险丝的至少一个透镜，并且禁用电路的第一配置 ，以及（ii）在该电路表面上或其附近照射至少一个其他透镜，足以使位于该透镜下方的对应的第二保险丝电气断开并使电路能够进行第二配置。 该结构和方法有利地提供具有改善的可靠性和更小的芯片面积的熔丝结构，从而提高制造工艺的产量和每个晶片的模具数量（总和良好）。

公开(公告)号：US07344924B1

公开(公告)日：2008-03-18

申请号：US11136925

申请日：2005-05-24

Applicant: Chuan-Cheng Cheng ,  Shuhua Yu ,  Roawen Chen ,  Albert Wu

Inventor： Chuan-Cheng Cheng ,  Shuhua Yu ,  Roawen Chen ,  Albert Wu

IPC: H01L21/82

CPC classification number: H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A fuse structure, an integrated circuit including the structure, and methods for making the structure and (re)configuring a circuit using the fuse. The fuse structure generally includes (a) a conductive structure with at least two circuit elements electrically coupled thereto, (b) a dielectric layer over the conductive structure, and (c) a first lens over both the first dielectric layer and the conductive structure configured to at least partially focus light onto the conductive structure. The method of making the structure generally includes the steps of (1) forming a conductive structure electrically coupled to first and second circuit elements, (2) forming a dielectric layer thereover, and (3) forming a lens on or over the dielectric layer and over the conductive structure, the lens being configured to at least partially focus light onto the conductive structure. The method of (re)configuring a circuit generally includes the steps of (i) irradiating at least one lens on or near a surface of the circuit sufficient to electrically disconnect a corresponding first fuse positioned under the lens and disable a first configuration of the circuit, and (ii) irradiating at least one other lens on or near the surface of the circuit sufficient to electrically disconnect a corresponding second fuse positioned under that lens and enable a second configuration of the circuit. The structure and methods advantageously provide fuse structures having improved reliability and smaller chip area, thereby increasing the yield of the manufacturing process and the numbers of die per wafer (both gross and good).

Abstract translation: 保险丝结构，包括该结构的集成电路，以及使用该保险丝的结构和（重新）配置电路的方法。 熔丝结构通常包括（a）具有至少两个电耦合到其上的电路元件的导电结构，（b）导电结构上的电介质层，和（c）第一介电层和导电结构上的第一透镜， 以至少部分地将光聚焦到导电结构上。 制造该结构的方法通常包括以下步骤：（1）形成电耦合到第一和第二电路元件的导电结构，（2）在其上形成介电层，和（3）在电介质层上或之上形成透镜， 在导电结构之上，透镜被配置为至少部分地将光聚焦到导电结构上。 （重新）配置电路的方法通常包括以下步骤：（i）在电路表面上或附近照射足够的电气断开位于透镜下方的对应的第一保险丝的至少一个透镜，并且禁用电路的第一配置 ，以及（ii）在该电路表面上或其附近照射至少一个其他透镜，足以使位于该透镜下方的对应的第二保险丝电气断开并使电路能够进行第二配置。 该结构和方法有利地提供具有改善的可靠性和更小的芯片面积的熔丝结构，从而提高制造工艺的产量和每个晶片的模具数量（总和良好）。