MEMBRANE PROBING OF CIRCUITS
    22.
    发明公开
    MEMBRANE PROBING OF CIRCUITS 失效
    电路与里德传感器取样

    公开(公告)号:EP0779989A1

    公开(公告)日:1997-06-25

    申请号:EP95931069.0

    申请日:1995-09-08

    CPC classification number: G01R1/0735

    Abstract: First and second bumps (9) electrically connected at first and second positions (62, 63) along a conductive run (52) borne by a flexible substrate (10) are respectively oriented for contact with a pad (8) of a die (2) under test and a pad (20) of a tester structure (1). Second (66, 98) and third (68, 100) conductive regions are electrically connected respectively to the power (Vcc) and ground (Vss) terminals of a power source and an electrical device. The second and third regions are spaced from a first conductive region (68, 91) to filter high-frequency noise components from power and ground potentials provided by the power source.

    MEMBRANE PROBING OF CIRCUITS
    23.
    发明公开
    MEMBRANE PROBING OF CIRCUITS 失效
    电路的薄膜探测

    公开(公告)号:EP0779987A1

    公开(公告)日:1997-06-25

    申请号:EP95931721.0

    申请日:1995-09-08

    CPC classification number: G01R1/0735

    Abstract: First (46) and second (62, 63) bumps electrically connected at first and second positions along a conductive run (52) borne by a flexible substrate (10) are respectively oriented for contact with a pad (8) of a die under test (2) and a pad (88, 89) of a tester. A probe frame (32) is bonded to the substrate between connector frames (34) bonded at opposite ends of the substrate (10). Alternatively, a pair of bumps (46, and 62, 63) exposed on the same surface of a flexible substrate (10) are electrically connected at different positions along on conductive run (52). One of the bumps (46) is oriented for contact with a pad (8) of a die under test (2), and the other (62, 63) is in contact with a pad (88, 89) on a surface of a printed circuit board (5) directed away from the die (2). The pad (88, 89) of the printed circuit board (5) is provided for electrical connection to a tester.

    Abstract translation: 沿着由柔性基板(10)承载的导电路径(52)在第一位置和第二位置处电连接的第一(46)和第二(62,63)凸块分别定向用于与被测试芯片的焊盘(8) (2)和测试器的衬垫(88,89)。 探针框架(32)在基底(10)的相对端处结合的连接器框架(34)之间结合到基底。 或者,暴露在柔性衬底(10)的同一表面上的一对凸块(46和62,63)在导电线路(52)上沿不同位置电连接。 其中一个凸起(46)被定向用于与被测试的模具(2)的垫(8)接触,并且另一个(62,63)与一个表面上的垫(88,89)接触 印制电路板(5)远离模具(2)。 印刷电路板(5)的垫(88,89)被提供用于电连接到测试器。

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