用於感測器之正交頻分掃描方法
    24.
    发明专利
    用於感測器之正交頻分掃描方法 审中-公开
    用于传感器之正交频分扫描方法

    公开(公告)号:TW201640301A

    公开(公告)日:2016-11-16

    申请号:TW105104195

    申请日:2016-02-05

    Abstract: 在實施例中,一設備包括經組態以操作性地耦接至一感測器(例如,一觸控面板感測器、一指紋感測器)之一控制器。該感測器包括複數個驅動電極及複數個感測電極。節點形成於該複數個驅動電極與該等感測電極之交叉點處。該控制器包括操作性地耦接至該複數個驅動電極之輸出電路。該輸出電路經組態以產生獨特驅動信號以驅動觸控面板感測器之對應驅動電極。該觸控面板控制器亦包括操作性地耦接至該等感測電極之輸入電路。該輸入電路經組態以量測形成於該複數個驅動電極之每一交叉點處的互電容以建立緊接於該感測器之一或多個物件之一影像。

    Abstract in simplified Chinese: 在实施例中,一设备包括经组态以操作性地耦接至一传感器(例如,一触摸皮肤传感器、一指纹传感器)之一控制器。该传感器包括复数个驱动电极及复数个传感电极。节点形成于该复数个驱动电极与该等传感电极之交叉点处。该控制器包括操作性地耦接至该复数个驱动电极之输出电路。该输出电路经组态以产生独特驱动信号以驱动触摸皮肤传感器之对应驱动电极。该触摸皮肤控制器亦包括操作性地耦接至该等传感电极之输入电路。该输入电路经组态以量测形成于该复数个驱动电极之每一交叉点处的互电容以创建紧接于该传感器之一或多个对象之一影像。

    整合式觸控及力偵測
    25.
    发明专利
    整合式觸控及力偵測 审中-公开
    集成式触摸及力侦测

    公开(公告)号:TW201638752A

    公开(公告)日:2016-11-01

    申请号:TW105104345

    申请日:2016-02-15

    Abstract: 本發明提供用於判定與一觸控事件相關聯之一力指數之系統、方法及設備。本發明中所描述之標的物之一項態樣可以觸控感測器系統實施。該觸控感測器系統可包括:包括複數個電極的一觸控螢幕,及可操作以感測來自該複數個電極之電信號的一感測電路。該觸控感測器系統亦可包括可操作以基於由該感測電路感測之該等電信號而產生一影像圖框的一影像處理模組。該觸控感測器系統亦可包括可操作以分析該影像圖框及基於該分析而識別觸控事件候選者的一特徵提取模組。該觸控感測器系統亦可包括可操作以針對每一經識別觸控事件候選者而判定該觸控事件候選者是否與一觸控事件相關聯的一觸控事件偵測模組。該觸控感測器系統進一步包括可操作以針對與一觸控事件相關聯之每一觸控事件候選者而判定與一物件效應相關聯之該影像圖框之一第一分量的一力偵測模組。該力偵測模組進一步可操作以針對與一觸控事件相關聯之每一觸控事件候選者而判定與一力效應相關聯之該影像圖框之一第二分量,及判定與該力效應相關聯之一力指數值。

    Abstract in simplified Chinese: 本发明提供用于判定与一触摸事件相关联之一力指数之系统、方法及设备。本发明中所描述之标的物之一项态样可以触摸传感器系统实施。该触摸传感器系统可包括:包括复数个电极的一触摸屏幕,及可操作以传感来自该复数个电极之电信号的一传感电路。该触摸传感器系统亦可包括可操作以基于由该传感电路传感之该等电信号而产生一影像图框的一影像处理模块。该触摸传感器系统亦可包括可操作以分析该影像图框及基于该分析而识别触摸事件候选者的一特征提取模块。该触摸传感器系统亦可包括可操作以针对每一经识别触摸事件候选者而判定该触摸事件候选者是否与一触摸事件相关联的一触摸事件侦测模块。该触摸传感器系统进一步包括可操作以针对与一触摸事件相关联之每一触摸事件候选者而判定与一对象效应相关联之该影像图框之一第一分量的一力侦测模块。该力侦测模块进一步可操作以针对与一触摸事件相关联之每一触摸事件候选者而判定与一力效应相关联之该影像图框之一第二分量,及判定与该力效应相关联之一力指数值。

    APPARATUS AND METHODS FOR EFFICIENT UPDATES IN SPIKING NEURON NETWORKS

    公开(公告)号:IN2625MUN2014A

    公开(公告)日:2015-10-16

    申请号:IN2625MUN2014

    申请日:2014-12-24

    Abstract: Efficient updates of connections in artificial neuron networks may be implemented. A framework may be used to describe the connections using a linear synaptic dynamic process characterized by stable equilibrium. The state of neurons and synapses within the network may be updated based on inputs and outputs to/from neurons. In some implementations the updates may be implemented at regular time intervals. In one or more implementations the updates may be implemented on demand based on the network activity (e.g. neuron output and/or input) so as to further reduce computational load associated with the synaptic updates. The connection updates may be decomposed into multiple event dependent connection change components that may be used to describe connection plasticity change due to neuron input. Using event dependent connection change components connection updates may be executed on per neuron basis as opposed to per connection basis.

    MOS TRANSISTOR OFFSET-CANCELLING DIFFERENTIAL CURRENT-LATCHED SENSE AMPLIFIER

    公开(公告)号:AU2022209322A1

    公开(公告)日:2022-09-01

    申请号:AU2022209322

    申请日:2022-07-28

    Abstract: Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages are provided. An OCZS-SA is configured to amplify received differential data and reference input voltages with a smaller sense amplifier offset voltage to provide larger sense margin between different storage states of memory bitcell(s). The OCZS-SA is configured to cancel out offset voltages of input and complement input transistors, and keep the input and complement input transistors in their activated state during sensing phases so that sensing is not performed in their "dead zones" when their gate-to-source voltage (Vgs) is below their respective threshold voltages. In other aspects, sense amplifier capacitors are configured to directly store the data and reference input voltages at gates of the input and complement input transistors during voltage capture phases to avoid additional layout area that would otherwise be consumed with additional sensing capacitor circuits.

    MOS transistor offset-cancelling differential current-latched sense amplifier

    公开(公告)号:AU2017332696A1

    公开(公告)日:2019-03-07

    申请号:AU2017332696

    申请日:2017-09-18

    Abstract: Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero-sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages are provided. An OCZS-SA is configured to amplify received differential data and reference input voltages with a smaller sense amplifier offset voltage to provide larger sense margin between different storage states of memory bitcell(s). The OCZS-SA is configured to cancel out offset voltages of input and complement input transistors, and keep the input and complement input transistors in their activated state during sensing phases so that sensing is not performed in their "dead zones" when their gate-to-source voltage (Vgs) is below their respective threshold voltages. In other aspects, sense amplifier capacitors are configured to directly store the data and reference input voltages at gates of the input and complement input transistors during voltage capture phases to avoid additional layout area that would otherwise be consumed with additional sensing capacitor circuits.

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