公开(公告)号：US20030154342A1

公开(公告)日：2003-08-14

申请号：US10072814

申请日：2002-02-08

Applicant: STMicroelectronics Limited

Inventor： Trefor Southwell ,  Peter Hedinger ,  Kristen Jacobs

IPC: G06F012/08

CPC classification number: G06F8/4442

Abstract: A memory map evaluation tool is provided which allows a program to be organised in a manner most compatible with use of a cache. This is done by executing a first version of the program according to a first memory map to generate a program counter trace, converting the program counter trace into a specific format and then translating the program counter trace into physical addresses using a memory map to be evaluated, different from the first memory map. Those physical addresses are then used to evaluate the number of likely cache misses using a model of a direct-mapped cache for the memory map under evaluation.

Abstract translation: 提供了一种存储器映射评估工具，其允许以与缓存的使用最相容的方式组织程序。 这是通过根据第一存储器映射执行程序的第一版本来完成的，以生成程序计数器跟踪，将程序计数器跟踪转换成特定格式，然后使用要评估的存储器映射将程序计数器跟踪转换为物理地址 ，与第一个存储器映射不同。 然后，这些物理地址用于使用正在评估的内存映射的直接映射高速缓存的模型来评估可能的高速缓存未命中的数量。

公开(公告)号：US20030076856A1

公开(公告)日：2003-04-24

申请号：US10167242

申请日：2002-06-11

Applicant: STMicroelectronics Limited

Inventor： Rodrigo Cordero ,  Patrice Woodward

IPC: H04J003/16

CPC classification number: H04N21/42615 ,  H04N21/426 ,  H04N21/434 ,  H04N21/4341 ,  H04N21/4345

Abstract: A receiver for receiving a data stream comprises a filtering arrangement for filtering said received data stream and a processor. The filtering arrangement is arranged to load at least a part of said data stream, to filter at least part of said data stream and to read at least part of said data stream. The filtering arrangement has a first mode in which said steps are carried out and a second mode in which said processor is arranged to interrupt the steps carried out by said filtering arrangement.

Abstract translation: 用于接收数据流的接收机包括用于过滤所述接收的数据流的过滤装置和处理器。 滤波装置被布置为加载所述数据流的至少一部分，以过滤所述数据流的至少一部分并读取所述数据流的至少一部分。 滤波装置具有执行所述步骤的第一模式和其中所述处理器被布置为中断由所述滤波装置执行的步骤的第二模式。

公开(公告)号：US20030001555A1

公开(公告)日：2003-01-02

申请号：US10161077

申请日：2002-05-31

Applicant: STMicroelectronics Limited

Inventor： Peter Johnson

IPC: G05F003/16 ,  G05F003/20

CPC classification number: G05F3/30

Abstract: A current source using a bandgap voltage circuit includes a current gain circuit between the output of the bandgap circuit and the current output transistor. On-off control is provided by a switchable bias circuit providing an ON potential to start the bandgap and a clamping circuit opening the feedback loop.

Abstract translation: 使用带隙电压电路的电流源包括在带隙电路的输出和电流输出晶体管之间的电流增益电路。 开关控制由提供导通电位的可切换偏置电路提供以启动带隙，以及钳位电路打开反馈回路。

公开(公告)号：US20020170041A1

公开(公告)日：2002-11-14

申请号：US10032155

申请日：2001-12-20

Applicant: STMicroelectronics Limited

Inventor： Richard Shann

IPC: G06F009/45

CPC classification number: G06F8/54

Abstract: A method of forming an executable program from a plurality of object code modules, each object code module having section data, a set of relocation instructions and one or more symbols, each symbol having a plurality of attributes associated therewith, wherein said relocation instructions includes a data retrieval instruction having a symbol field identifying a symbol and an attribute field identifying a symbol attribute associated with said identified symbol to be retrieved, the method includes: reading at least one relocation from said set of relocations instruction and where said relocation instruction is a data retrieval instruction, determining the symbol identified by the symbol field and retrieving one of said plurality of symbol attributes associated with said symbol in dependence on the contents of the symbol attributes field of said instruction.

Abstract translation: 一种从多个目标代码模块形成可执行程序的方法，每个目标代码模块具有分段数据，一组重定位指令和一个或多个符号，每个符号具有与之相关联的多个属性，其中所述重定位指令包括 具有标识符号的符号字段的数据检索指令和标识与要检索的所述识别符号相关联的符号属性的属性字段，所述方法包括：从所述重定位指令集中读取至少一个重定位，并且其中所述重定位指令是数据 检索指令，确定符号字段识别的符号，并根据所述指令的符号属性字段的内容，检索与所述符号相关联的所述多个符号属性中的一个。

公开(公告)号：US20020125917A1

公开(公告)日：2002-09-12

申请号：US10143417

申请日：2002-05-10

Applicant: STMicroelectronics Limited

Inventor： William Barnes

IPC: H03F003/45

CPC classification number: H03K5/249 ,  H03K3/356139 ,  H03K5/2481

Abstract: A comparator circuit with comparing means for comparing first and second voltages, has current source circuitry for providing current to said comparing means, said current source circuitry having an input for receiving a clock signal having first and second states, whereby the comparing means starts to compare the first and second voltages when the clock signal makes a transition from the first state to the second state; and means for determining when said comparing means has completed a comparison of said first and second voltages and for switching off said current source circuitry and hence said comparing means when said comparison has been completed.

Abstract translation: 具有用于比较第一和第二电压的比较装置的比较器电路具有用于向所述比较装置提供电流的电流源电路，所述电流源电路具有用于接收具有第一和第二状态的时钟信号的输入，由此比较装置开始比较 当时钟信号从第一状态转变到第二状态时的第一和第二电压; 以及用于确定何时所述比较装置已经完成了所述第一和第二电压的比较并且用于当所述比较完成时关闭所述电流源电路以及因此所述比较装置的装置。

公开(公告)号：US20040105242A1

公开(公告)日：2004-06-03

申请号：US10714760

申请日：2003-11-17

Applicant: STMicroelectronics Limited

Inventor： Paul Evans

IPC: H05K007/10

CPC classification number: H01R12/523 ,  H05K1/144

Abstract: A stackable module for a processor system including a support plate with a set of topside circuit components mounted to its topside, and topside and underside connectors. The module is stackable with other such modules and are provided with conductive tracks that are arranged to convey transport stream data and transport stream control signals between modules in a stack. A stack of such modules in a processor system is also provided.

公开(公告)号：US20030196041A1

公开(公告)日：2003-10-16

申请号：US10446280

申请日：2003-05-23

Applicant: STMicroelectronics Limited

Inventor： Andrew Craig Sturges ,  David May

IPC: G06F012/00

CPC classification number: G06F12/0804 ,  G06F12/0842 ,  G06F12/0848 ,  G06F12/0864 ,  G06F12/1045

Abstract: A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.

Abstract translation: 提供一种缓存系统，其包括高速缓冲存储器和高速缓冲存储器补充机制，其根据主存储器中的项目的地址将高速缓冲存储器中的一组高速缓存分区中的一个或多个分配给项目。 这在所描述的实施例之一中通过用项目的地址包括一组分区选择器位来实现，所述分组选择器位允许生成分区掩码以识别可以加载该物品的高速缓存分区。

公开(公告)号：US20030182570A1

公开(公告)日：2003-09-25

申请号：US10354891

申请日：2003-01-30

Applicant: STMicroelectronics Limited

Inventor： Andrew Dellow

IPC: G06F011/30

CPC classification number: G06F21/575 ,  G06F21/64

Abstract: A semiconductor integrated circuit includes a processor for executing application code from a memory and a verifier processor arranged to receive the application code via the same internal bus as the processor. The verifier processor performs a verification function to check that the application code is authentic. The verifier processor runs autonomously and cannot be spoofed as it receives the application code via the same internal bus as the main processor.

Abstract translation: 半导体集成电路包括用于从存储器执行应用代码的处理器和被布置为经由与处理器相同的内部总线接收应用代码的验证器处理器。 验证者处理器执行验证功能以检查应用代码是否可信。 验证者处理器自动运行，并且不能通过与主处理器相同的内部总线接收应用代码而被欺骗。

公开(公告)号：US20030107825A1

公开(公告)日：2003-06-12

申请号：US10171453

申请日：2002-06-13

Applicant: STMicroelectronics S.r.I. ,  STMicroelectronics Limited

Inventor： Pierangelo Magni ,  Francesco Sala ,  Eric Christison ,  Andrea Giovanni Cigada

IPC: G02B007/02

CPC classification number: G02B7/022 ,  G02B7/04 ,  H01L31/0203 ,  H01L31/02325 ,  H04N5/2253 ,  H04N5/2254

Abstract: An image-detecting device including: a body housing a sensor; a first supporting element, rigidly coupled with the body and defining a seat; and an objective including at least one optical unit having an optical axis. The seat forms a guide portion engaging directly and slidably an alignment portion formed by said optical unit to keep the optical axis orthogonal to the sensor.

Abstract translation: 一种图像检测装置，包括：容纳传感器的主体; 第一支撑元件，与主体刚性联接并且限定座椅; 以及包括具有光轴的至少一个光学单元的目标。 所述座部形成与所述光学单元形成的对准部分直接且可滑动地接合以使光轴正交于所述传感器的引导部。

公开(公告)号：US20030106048A1

公开(公告)日：2003-06-05

申请号：US10103655

申请日：2002-03-20

Applicant: STMicroelectronics Limited

Inventor： Sean McGoogan ,  Richard Shann

IPC: G06F009/45 ,  G06F009/44

CPC classification number: G06F9/45512 ,  G06F9/44521

Abstract: A method of forming an executable program from a plurality of object code modules, each object code module including a plurality of relocation instructions having at least one information output relocation with a field indicating information to be output, the method including reading a relocation instruction from one of the object code modules, and when the read relocation instruction is an information output relocation, displaying the information indicated in the field in a human readable form.

Abstract translation: 一种从多个目标代码模块形成可执行程序的方法，每个目标代码模块包括具有至少一个信息输出重定位的多个重定位指令，其中一个字段指示要输出的信息，该方法包括从一个目标代码模块读取重定位指令 的目标代码模块，并且当读取重定位指令是信息输出重定位时，以人类可读形式显示在该领域中指示的信息。