中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

70 records (took 0.025 seconds)

    Silicon level solution for mitigation of substrate noise
    21.
    发明申请
    Silicon level solution for mitigation of substrate noise 审中-公开
    硅片解决方案，用于减轻衬底噪声

    公开(公告)号：US20080001262A1

    公开(公告)日：2008-01-03

    申请号：US11479583

    申请日：2006-06-29

    Applicant: Telesphor Kamgaing

    Inventor： Telesphor Kamgaing

    IPC: H01L23/552

    CPC classification number: H01L21/823878 ,  H01L21/76224 ,  H01L21/764 ,  H01L21/76898 ,  H01L21/823481 ,  H01L23/481 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The techniques described herein reduce the substrate noise current that exists when digital and analog components reside on the same microelectronic die. Single or multiple rows of isolation vias form isolation barriers between the individual circuit blocks. The isolation vias may be hollow or (lined or filled) with a conductive or non-conductive material.

    Abstract translation: 这里描述的技术减少了当数字和模拟组件驻留在相同的微电子管芯上时存在的衬底噪声电流。 单个或多排隔离通孔在各个电路块之间形成隔离屏障。 隔离通孔可以是中空的或（衬里的或填充的）导电或非导电材料。

    HYBRID PACKAGE TRANSMISSION LINE CIRCUITS
    27.
    发明申请
    HYBRID PACKAGE TRANSMISSION LINE CIRCUITS 有权
    混合包传输线路电路

    公开(公告)号：US20150069629A1

    公开(公告)日：2015-03-12

    申请号：US14543838

    申请日：2014-11-17

    Applicant: Chung Peng Jackson KONG ,  Chang-Tsung Fu ,  Telesphor Kamgaing ,  Chan Kim Lee ,  Ping Ping Ooi

    Inventor： Chung Peng Jackson KONG ,  Chang-Tsung Fu ,  Telesphor Kamgaing ,  Chan Kim Lee ,  Ping Ping Ooi

    IPC: H01L23/522 ,  H01L23/528

    CPC classification number: H01L23/5226 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/528 ,  H01L2224/16

    Abstract: “Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.

    Abstract translation: 描述了采用多个互连级别以跨越封装长度传播或返回单条信号线的“混合”传输线路电路。 在封装传输线路电路实施例中，信号线在电耦合在一起的两个不同的互连级别中使用共同定位的迹线。 在另外的实施例中，参考平面被提供在至少一个共定位轨迹的上方，下方或共面上。 在实施例中，平衡信号线对包括作为传播信号线的两个相邻互连级别中的第一和第二同位置迹线，以及在两个相邻互连级别中的第三和第四同位序列作为具有接地平面Co 平面，和/或上方和/或下方两个相邻互连层。

    Hybrid package transmission line circuits
    28.
    发明授权
    Hybrid package transmission line circuits 有权
    混合封装传输线路电路

    公开(公告)号：US08890302B2

    公开(公告)日：2014-11-18

    申请号：US13538887

    申请日：2012-06-29

    Applicant: Chung Peng (Jackson) Kong ,  Chang-Tsung Fu ,  Telesphor Kamgaing ,  Chan Kim Lee ,  Ping Ping Ooi

    Inventor： Chung Peng (Jackson) Kong ,  Chang-Tsung Fu ,  Telesphor Kamgaing ,  Chan Kim Lee ,  Ping Ping Ooi

    IPC: H01L23/48 ,  H01L23/52

    CPC classification number: H01L23/5226 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/528 ,  H01L2224/16

    Abstract: “Hybrid” transmission line circuits employing multiple interconnect levels for the propagation, or return, of a single signal line across a package length are described. In package transmission line circuit embodiments, a signal line employs co-located traces in two different interconnect levels that are electrically coupled together. In further embodiments, a reference plane is provided above, below or co-planar with at least one of the co-locate traces. In embodiments, a balanced signal line pair includes first and second co-located traces in two adjacent interconnect levels as a propagation signal line and third and fourth co-located traces in the two adjacent interconnect levels as a return signal line with a ground plane co-planar with, and/or above and/or below the two adjacent interconnect levels.

    Abstract translation: 描述了采用多个互连级别以跨越封装长度传播或返回单条信号线的“混合”传输线路电路。 在封装传输线路电路实施例中，信号线在电耦合在一起的两个不同的互连级别中使用共同定位的迹线。 在另外的实施例中，参考平面被提供在至少一个共定位轨迹的上方，下方或共面上。 在实施例中，平衡信号线对包括作为传播信号线的两个相邻互连级别中的第一和第二同位置迹线，以及在两个相邻互连级别中的第三和第四同位序列作为具有接地平面Co 平面，和/或上方和/或下方两个相邻互连层。

    Package-based filtering and matching solutions
    29.
    发明授权
    Package-based filtering and matching solutions 有权
    基于包的过滤和匹配解决方案

    公开(公告)号：US08804366B2

    公开(公告)日：2014-08-12

    申请号：US13316811

    申请日：2011-12-12

    Applicant: Telesphor Kamgaing ,  Emile Davies-Venn

    Inventor： Telesphor Kamgaing ,  Emile Davies-Venn

    IPC: H05K7/00

    CPC classification number: H01P1/212 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/48095 ,  H01L2224/48225 ,  H01L2224/48237 ,  H01L2224/49113 ,  H01L2924/181 ,  H01L2924/00012

    Abstract: A microelectronic package having a radio frequency (RF) amplifier circuit and, incorporating harmonic rejection filters and matching circuits integrally formed in the package is disclosed. A harmonic rejection filter may comprise a metal-insulator-metal (MIM) capacitor serially coupled between bond pads disposed on a RF amplifier circuit die, a first wire bond coupling a first bond pad to a package output, where the first bond pad is coupled to the output of the RF amplifier, and a second wire bond coupling a second bond pad to a package ground. The harmonic rejection filter may be appropriately configured to filter one or more harmonics at different frequencies.

    Abstract translation: 公开了一种具有射频（RF）放大器电路并且并入谐波抑制滤波器和整体形成在封装中的匹配电路的微电子封装。 谐波抑制滤波器可以包括串联连接在RF放大器电路管芯上的接合焊盘之间的金属 - 绝缘体 - 金属（MIM）电容器，将第一接合焊盘耦合到封装输出端的第一引线键合，其中第一接合焊盘耦合 到RF放大器的输出，以及将第二接合焊盘耦合到封装地的第二引线接合。 谐波抑制滤波器可以被适当地配置为滤波不同频率的一个或多个谐波。

    Drive and startup for a switched capacitor divider
    30.
    发明授权
    Drive and startup for a switched capacitor divider 有权
    开关电容分压器的驱动和启动

    公开(公告)号：US08710903B2

    公开(公告)日：2014-04-29

    申请号：US12217078

    申请日：2008-06-30

    Applicant: Bradley Oraw ,  Telesphor Kamgaing

    Inventor： Bradley Oraw ,  Telesphor Kamgaing

    IPC: G11C5/14

    CPC classification number: G11C5/147 ,  H02M1/36 ,  H02M3/07 ,  H02M2003/072

    Abstract: Drive and startup circuits are described particularly suitable for use with a switched capacitor divider. In one example, a drive circuit has a level shifter coupled to a gate of each switch of a switched capacitor drive circuit to couple alternating current into the respective gate, a positive phase low side driver coupled to each level shifter to drive the gates of the top switch path through the respective level shifters, and a negative phase low side driver coupled to each level shifter to drive gates of the bottom switch path through the respective level shifters. A startup circuit, such as a capacitive soft start circuit may be used to slow the application of the current to each switch.

    Abstract translation: 驱动和启动电路被特别适用于开关电容分压器。 在一个示例中，驱动电路具有耦合到开关电容器驱动电路的每个开关的栅极的电平移位器，以将交流电耦合到相应的栅极中，耦合到每个电平移位器的正相低侧驱动器来驱动 通过相应电平移位器的顶部开关路径，以及耦合到每个电平移位器的负相位低侧驱动器，以驱动通过相应电平移位器的底部开关路径的栅极。 可以使用诸如电容软启动电路的启动电路来减慢对每个开关的电流的施加。

Patent Agency Ranking