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公开(公告)号：JP2005128467A
公开(公告)日：2005-05-19
申请号：JP2003424825
申请日：2003-12-22
Inventor： MORIMOTO YOSHIHIRO , SAI ASHO , TSAI YAW-MING , CHANG SHIH-CHANG
IPC: G02F1/1368 , G02F1/13 , G09F9/30 , H01L21/3205
Abstract: PROBLEM TO BE SOLVED: To form a highly planarized flat layer and a conductive layer by measuring the flatness of a planarized layer when manufacturing a TFT display panel. SOLUTION: This display panel has a base plate 21, a channel layer 23 formed on the above base plate 21, an insulation layer 24 formed on the channel layer 23 and having a first and second contact holes 241, 242 to expose a part of the channel layer 23, a second conductor layer 25 formed on a part of the insulation layer 24 and filled in the first contact hole 241, a flat layer 26 formed on a part of the insulation layer 24 and the second conductor layer 25 and filled in the second contact hole 242, and a conductor layer 27 formed on the flat layer 26 and on a part of the second conductor layer 25. The second contact hole 242 is used for measuring the flatness of the flat layer 26. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract translation: 要解决的问题：通过在制造TFT显示面板时测量平坦化层的平坦度，形成高度平坦化的平坦层和导电层。 解决方案：该显示面板具有基板21，形成在上述基板21上的沟道层23，形成于沟道层23上的绝缘层24，具有第一和第二接触孔241,242， 沟道层23的一部分，形成在绝缘层24的一部分上并填充在第一接触孔241中的第二导体层25，形成在绝缘层24和第二导体层25的一部分上的平坦层26和 填充在第二接触孔242中，以及形成在平坦层26和第二导体层25的一部分上的导体层27.第二接触孔242用于测量平坦层26的平坦度。 版权所有（C）2005，JPO＆NCIPI
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公开(公告)号：JP2004157178A
公开(公告)日：2004-06-03
申请号：JP2002320255
申请日：2002-11-01
Inventor： CHUN CHUU TSUON , WANG WEI
Abstract: PROBLEM TO BE SOLVED: To provide a non-superimposed sampling pulse signal generator which can be applied to an active matrix display device, and to provide a method for generating the signal.
SOLUTION: The signal generator includes a pulse distributor 30, a guard signal generator 32, and a logic arithmetic circuit 31. The method for generating the signal comprises the steps wherein the pulse distributor 30, responding to the trigger of a start pulse, successively generates and outputs a plurality of pulse signals SR0, SR1 and so on having different phases; the guard signal generator 32 supplies guard signals which carry out switching between a first level and a second level; and the logic arithmetic circuit 31, receiving the pulse signals and guard signals, carries out calculation and successively outputs a plurality of sampling signals ϕ1, ϕ2 and so on, and avoids superposition by providing, based on the time of the second level where the guard signal is located, time difference Td to a sampling area of sampling signals adjacent to each other.
COPYRIGHT: (C)2004,JPO-
公开(公告)号：AU2003231217A8
公开(公告)日：2003-11-17
申请号：AU2003231217
申请日：2003-04-29
Applicant: UNIV CENTRAL FLORIDA , TOPPOLY OPTOELECTRONICS CORP
Inventor： CHOI WING KIT , WU SHIN-TSON
IPC: G02F1/13 , G02F1/017 , G02F1/1335 , G02F1/1343 , C09K19/02
Abstract: A high reflection and transmission transflective liquid crystal display (TLCD) that requires only a single cell gap. Instead of reducing the cell gap of the R sub-pixel region, the invention reduces the birefringence change Deltan of reflective pixels (R) so that the total retardation change Deltand of R is equal to that of the transmissive pixels (T). This is realized by a partial switching of the pixels of approximately 45 degrees which occurs in the reflective pixel (R) region of the single cell gap by applying fringing fields, generated by a discontinuous electrode, to the molecules in the reflective pixel (R) region of the cell gap.
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公开(公告)号：JP2004145288A
公开(公告)日：2004-05-20
申请号：JP2003270712
申请日：2003-07-03
Inventor： CHIU CHAUNG-MING
Abstract: PROBLEM TO BE SOLVED: To lower the manufacturing cost of a plane display panel with a small number of signal pins for measurement test and to make a measurement test speedy and accurate. SOLUTION: For the plane display panel, provided are a next element, i.e. a substrate, a pixel matrix which is installed on the substrate, a display control circuit which is installed on the substrate and electrically connected to the display pixel matrix and perform ON/OFF control over the pixel matrix, and a setting-in type measurement test circuit which is installed on the substrate and electrically connected to the display control circuit, conducts a measurement test of the display control circuit and outputs a measurement test result obtained there to the panel. COPYRIGHT: (C)2004,JPO
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公开(公告)号：AU2003234341A8
公开(公告)日：2003-11-11
申请号：AU2003234341
申请日：2003-05-02
Applicant: TOPPOLY OPTOELECTRONICS CORP , UNIV OF CENTRAL FLORIDA
Inventor： WU SHIN-TSON
IPC: G02F1/1335
Abstract: A device structure for single cell gap reflective and transflective liquid crystal displays (TF-LCDs). For an entirely reflective LCD, the imbedded wire-grid polarizer (WGP) serves as a polarization-dependent for the ambient light. For a transflective TF-LCD, the WGP only covers the reflective pixels. The disclosure also includes a method of using single cell gap liquid crystal displays (LCDs) without phase retardation films by providing a single cell gap LCD having reflective pixels and transmissive pixels, covering solely the reflective pixels, with at least one of: a wire grid polarizer and a broadband cholesteric reflector (BCR), reflecting ambient light off the reflective pixels; and passing back light through the transmissive pixels whereby the cell gap LCD obtains high contrast ratios without using phase retardation films.
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Patent Agency Ranking26.发明专利
公开(公告)号：AU2003243193A8
公开(公告)日：2003-11-11
申请号：AU2003243193
申请日：2003-05-05
Applicant: RESEARCH FOUNDATION OF THE UNIVERSITY OF CENTRAL FLORIDA INCORPORATED , TOPPOLY OPTOELECTRONICS CORP
Inventor： HUANG YI-PAI , ZHU XIN-YU , WU SHIN-TSON , SHIEH HAN-PING
IPC: G02F1/1335
Abstract: Single cell gap transflective liquid crystal display which provides that the backlight traverses the reflective pixel portion twice and thereby follows a path similar to that of the ambient light. A slant reflector is built on the path of the back light to reflect the transmitted light to the reflective portion so that the back light and ambient light follow similar paths.
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公开(公告)号：AU2003234489A8
公开(公告)日：2003-11-11
申请号：AU2003234489
申请日：2003-05-06
Applicant: TOPPOLY OPTOELECTRONICS CORP , UNIV OF CENTRAL FLORIDA
Inventor： CHOI WING KIT , WU SHIN-TSON
IPC: G02F1/1335 , G02F1/139
Abstract: Transflective twisted nematic (TN) liquid crystal displays(LCDs) having enhanced transmission efficiencies. Due to the use of circularly polarized light, the novel TN transflective LCD uses a new operation mode between the conventional First and Second Minimums, which alters the retardation value of the reflection and the transmission portions, where the retardation values each include a cell gap spacing. This results in the cell gap spacing in the transmission portion of the transflective LCD to be approximately triple the cell gap spacing in the reflection portion of the transflective LCD whereby the transmission efficiency increases to approximately 90 percent.
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公开(公告)号：JP2007072828A
公开(公告)日：2007-03-22
申请号：JP2005260197
申请日：2005-09-08
Inventor： LIN CHING-WEI , JAN CHUEH-KUEI , HSIEH MENG-HSUN
Abstract: PROBLEM TO BE SOLVED: To provide a system and a method for generating a reference voltage for solving problems of the prior art.
SOLUTION: An integrated reference voltage generation circuit, included in a system for generating the reference voltage, comprises: a resistance circuit including a plurality of resistors connected in series; a first switch that is to be coupled between a first end of the resistance circuit and a first power source; a second switch that is to be coupled between the first end of the resistance circuit and a second power source; a third switch that is to be coupled to a second end of the resistance circuit; a fourth switch that is to be coupled to the second end of the resistance circuit; a first resistor that is to be coupled between the first end of the resistance circuit and the first switch; a second resistor that is to be coupled to the first end of the resistance circuit and the second switch; a third resistor that is to be coupled between the second end of the resistance circuit and the third switch; a fourth resistor that is to be coupled between the second end of the resistance circuit and the fourth switch; and a control circuit for controlling from the first switch to the fourth switch.
COPYRIGHT: (C)2007,JPO&INPITAbstract translation: 要解决的问题：提供一种用于产生用于解决现有技术问题的参考电压的系统和方法。 解决方案：包括在用于产生参考电压的系统中的集成参考电压产生电路包括：电阻电路，包括串联连接的多个电阻; 要耦合在电阻电路的第一端和第一电源之间的第一开关; 要耦合在电阻电路的第一端和第二电源之间的第二开关; 第三开关，其耦合到电阻电路的第二端; 第四开关，其耦合到电阻电路的第二端; 要耦合在电阻电路的第一端和第一开关之间的第一电阻器; 要耦合到电阻电路的第一端和第二开关的第二电阻器; 要耦合在电阻电路的第二端和第三开关之间的第三电阻器; 要耦合在电阻电路的第二端和第四开关之间的第四电阻器; 以及用于从第一开关控制到第四开关的控制电路。 版权所有（C）2007，JPO＆INPIT
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公开(公告)号：JP2004303791A
公开(公告)日：2004-10-28
申请号：JP2003092005
申请日：2003-03-28
Inventor： SHIH AN , MO SHOU , KAKU BUNGEN
IPC: G02F1/1368 , H01L21/336 , H01L29/786
Abstract: PROBLEM TO BE SOLVED: To form an n-channel thin film transistor wherein a light doping drain electrode structure and its upper gate electrode structure overlap without increasing counter of masking, in thin film transistor structure applied to a flat display, and to provide its manufacturing method. SOLUTION: Length or width of the gate electrode conductor structure 31 of a first thin film transistor 3N formed in the driving circuit region of the flat display is made to equal to or larger than length or width wherein length or width of a light doping drain electrode region 30 is added to length or width of a channel region 34. Length or width of the gate electrode conductor structure 33 of a second thin film transistor 3N' formed in an active matrix region is made nearly equal to length or width of a channel region 32. COPYRIGHT: (C)2005,JPO&NCIPI
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公开(公告)号：JP2004272056A
公开(公告)日：2004-09-30
申请号：JP2003064748
申请日：2003-03-11
Inventor： HSUEH WEI-CHIEH
Abstract: PROBLEM TO BE SOLVED: To provide a pixel driving circuit of active matrix ELD which causes electric currents flowing through organic light emitting diode upon both memorizing state and emission state to be approximately equal and allows the light emission intensity to be invariant.
SOLUTION: A driving current generates a specified voltage on a capacitor upon the memorizing state and, upon the emission state, a bias is applied onto a transistor and the organic light emission diode by utilizing the specified voltage on the capacitor. By utilizing a pixel drive circuit structure of the organic light emitting diode, the electric currents flowing through organic light emitting diode upon memorizing state or emission state become approximately equal.
COPYRIGHT: (C)2004,JPO&NCIPI
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