公开(公告)号：KR1020130050787A

公开(公告)日：2013-05-16

申请号：KR1020110116031

申请日：2011-11-08

Applicant: 포항공과대학교 산학협력단

Inventor： 전경훈

IPC: G06F13/14

CPC classification number: G06F13/14 ,  G06F13/372

Abstract: PURPOSE: A logical address allocating device of a slave device and a recognizing method thereof are provided to reduce the hardware area of the device by allocating a logical address of the device required for data communication between a master and a device to the lowest lowest number of pins. CONSTITUTION: A clock generating unit(320) generates a clock signal of various speeds and a filter(400) filters the clock signal of various speeds. A sampling unit(330) samples the filtered signal and an address allocating unit(340) allocates an address of a slave device based on the sampled signal. The sampling unit includes a schmitt trigger and the address allocating unit maps the sampled signal with the address of the device. [Reference numerals] (100) Master device; (310) Data transceiving unit; (320) Clock generating unit; (330) Sampling unit; (340) Address allocating unit

Abstract translation: 目的：提供从属设备的逻辑地址分配设备及其识别方法，以通过将主设备与设备之间的数据通信所需的设备的逻辑地址分配到最低数量的设备来减少设备的硬件区域 引脚。 构成：时钟生成单元（320）生成各种速度的时钟信号，并且滤波器（400）对各种速度的时钟信号进行滤波。 采样单元（330）对经滤波的信号进行采样，并且地址分配单元（340）基于采样信号分配从设备的地址。 采样单元包括施密特触发器，并且地址分配单元将采样信号与设备的地址进行映射。 （附图标记）（100）主装置; （310）数据收发单元; （320）时钟发生单元; （330）采样单元; （340）地址分配单元

公开(公告)号：KR1020110127012A

公开(公告)日：2011-11-24

申请号：KR1020100046618

申请日：2010-05-18

Applicant: 포항공과대학교 산학협력단

Inventor： 전경훈 ,  김용상 ,  황영준

IPC: H04L9/14

CPC classification number: H04L1/0047 ,  H04L1/0057 ,  H04L1/0071

Abstract: PURPOSE: A decoding method using a non-binary belief propagation algorithm including a new stop condition and a device thereof are provided to perform decoding with calculation complexity lower than average iteration. CONSTITUTION: A decoding device includes an equalizer(1001), a deinterleaver(1003), a decoder(1005), and an interleaver(1007). The decoder includes a stop condition algorithm. The equalizer compensates for deformation which occurs during signal amplification and transmission. An interleaver converts a group error into a random error wherein the group error occurs during traffic transmission. The deinterleaver is rearranged by interleavers. A value outputted from the deinterleaver is inputted to a decoder. The decoder performs repetitive decoding.

Abstract translation: 目的：提供一种使用包含新的停止条件及其装置的非二进制置信传播算法的解码方法，以便计算复杂度低于平均迭代进行解码。 构成：解码装置包括均衡器（1001），解交织器（1003），解码器（1005）和交织器（1007）。 解码器包括停止条件算法。 均衡器补偿信号放大和传输期间发生的变形。 交织器将组错误转换为随机错误，其中在业务传输期间发生组错误。 解交织器由交织器重新排列。 从解交织器输出的值被输入到解码器。 解码器执行重复解码。

公开(公告)号：KR1020110068377A

公开(公告)日：2011-06-22

申请号：KR1020090125300

申请日：2009-12-16

Applicant: 포항공과대학교 산학협력단

Inventor： 전경훈 ,  설창규

IPC: H03M13/25 ,  H03M13/45 ,  H04L27/00

CPC classification number: H04L25/067

Abstract: PURPOSE: A method and device for generating soft decision information based on a non-Gaussian channel in a wireless communication system are provided to increase a cell capacity, thereby increasing the decoding performance of a channel. CONSTITUTION: A receiver receives a data bit(S100). The receiver processes the received data bit in advance(S110). A transmission symbol can be detected from the received data during the process of processing the received data bit in advance. The receiver models the distribution of interference signals and noise components by a non-Gaussian probability density function. The receiver estimates a medium variable of the non-Gaussian probability density function(S120).

Abstract translation: 目的：提供一种用于在无线通信系统中生成基于非高斯信道的软判决信息的方法和装置，以增加小区容量，从而增加信道的解码性能。 构成：接收器接收数据位（S100）。 接收机预先处理接收到的数据位（S110）。 在处理接收到的数据位的处理中可以预先从接收到的数据中检测发送符号。 接收机通过非高斯概率密度函数来模拟干扰信号和噪声分量的分布。 接收机估计非高斯概率密度函数的中等变量（S120）。

公开(公告)号：KR101026021B1

公开(公告)日：2011-03-30

申请号：KR1020090087731

申请日：2009-09-16

Applicant: 포항공과대학교 산학협력단

Inventor： 전경훈 ,  김정창

IPC: H04B7/04

CPC classification number: H04L1/0631 ,  H04L1/0643

Abstract: PURPOSE: A method and an apparatus for decoding space-time block codes are provided to reduce the detection complexity of a general space-time block code system. CONSTITUTION: A processor(510) selects a layer which is located at the lowest part after rearranging as a new candidate layer. The processor creates N dimension candidate symbol vectors by performing DF(Decision Feedback) process to the rest layers excepting the candidate layer. The processor detects N dimension input vector by performing maximum likelihood detection about the candidate symbol vectors. A transceiver(530) is connected to the processor.

Abstract translation: 目的：提供一种用于解码空时块码的方法和装置，以减少通用时空块码系统的检测复杂度。 构成：处理器（510）在重新布置之后选择位于最下部的层作为新的候选层。 处理器通过对除候选层之外的其余层执行DF（决策反馈）处理来创建N维候选符号向量。 处理器通过对候选符号向量执行最大似然检测来检测N维输入向量。 收发器（530）连接到处理器。

公开(公告)号：KR100838456B1

公开(公告)日：2008-06-16

申请号：KR1020060110830

申请日：2006-11-10

Applicant: 포항공과대학교 산학협력단

Inventor： 전경훈 ,  김정창

IPC: H04L27/26 ,  H04L7/08 ,  H04L7/10 ,  H04J11/00

Abstract: 본 발명은 OFDM 시스템에서 반송파 주파수 오프셋 추정 범위 확장을 위한 프리앰블 설계와 상기 프리앰블을 이용한 타이밍/주파수 동기 및 기지국 탐색 방법에 관한 것이다. 본 발명의 프리앰블 심벌은, 시간 영역에서 유효 OFDM 심벌 앞에 삽입되는 순환 프리픽스와, 시간 영역에서 긴 반복 패턴들이 반복 형성되고 상기 긴 반복 패턴들 내에 다수의 짧은 반복 패턴이 각각 반복적으로 형성되어 있는 유효 프리앰블 심벌을 포함한다. 또한, 상기 프리앰블 심벌을 이용한 타이밍/주파수 동기 및 기지국 탐색 방법은, 시간 영역에서 수신 프리앰블 신호 내의 반복 패턴들 사이의 교차상관을 계산하여 타이밍 동기를 획득하는 타이밍 동기 획득 과정과, 타이밍 동기 획득 후 수신 프리앰블 신호 내의 반복 패턴들 사이의 교차상관 값의 위상차를 구함으로써 반송파 주파수 오프셋을 추정하는 반송파 주파수 오프셋 추정 과정과, 타이밍 및 주파수 동기 획득 후 수신 프리앰블 신호를 고속 퓨리에변환 취한 값과 기지국 구분 수열들과의 교차상관을 계산하여 기지국 탐색을 수행하는 기지국 탐색 과정을 포함한다.
OFDM, 직교, 주파수 분할 다중화, 프리앰블, 동기, 기지국, 순환 프리픽스

公开(公告)号：KR100796423B1

公开(公告)日：2008-01-21

申请号：KR1020060109852

申请日：2006-11-08

Applicant: 포항공과대학교 산학협력단

Inventor： 전경훈 ,  김용상

IPC: H04B7/04 ,  H04L27/32 ,  H04L12/28

CPC classification number: H04B7/0413 ,  H04B7/06 ,  H04L45/48

Abstract: A tree searching method in an MIMO(Multiple Input Multiple Output) system is provided to be easily applicable to conventional various tree searching algorithms and to has decoding performance not lower than a conventional tree searching algorithm. A tree searching method in an MIMO(Multiple Input Multiple Output) system comprises the following several steps. The MIMO system gets a survival path, which means a path where derivation of a branch at the i-1 th level is allowed and gets M sets of modulated symbols forming each survival path which are called sets of survival modulated symbols(S202-S206). The MIMO system discriminates the first group from the second group by comparing sequences of the sets of survival modulated symbols with a preset optimized constant(S208). The MIMO system calculates an accumulated partial Euclidean distance by performing the tree searching operation for the sets of survival modulated symbols included in the first group according to a general M algorithm(S210). The MIMO system calculates a single partial Euclidean distance by performing branch derivation with only one child node per mother node for the sets of survival modulated symbols included in the second group(S212-S216). The MIMO system selects M paths among paths derived from the first group and the second group and determines a survival path for the I th level(S220,S222).

Abstract translation: 提供了一种MIMO（多输入多输出）系统中的树形搜索方法，可以方便地应用于传统的各种树型搜索算法，具有不低于传统树形搜索算法的解码性能。 MIMO（多输入多输出）系统中的树形搜索方法包括以下几个步骤。 MIMO系统获得存活路径，这意味着允许在第i-1级的分支的导出并且获得M组的调制符号的路径，其形成每个存活路径，这被称为生存调制符号集（S202-S206） 。 MIMO系统通过比较生存调制符号组的序列与预设的优化常数来区分第一组与第二组（S208）。 MIMO系统通过根据通用M算法对包含在第一组中的生存调制符号组进行树搜索操作来计算累积的部分欧几里德距离（S210）。 MIMO系统通过对于包括在第二组中的生存调制符号集合执行仅每个母节点的一个子节点的分支导出来计算单个部分欧几里德距离（S212-S216）。 MIMO系统在从第一组和第二组导出的路径中选择M个路径，并确定第I级的生存路径（S220，S222）。

公开(公告)号：KR100659281B1

公开(公告)日：2007-02-28

申请号：KR1020050105060

申请日：2005-11-03

Applicant: 학교법인 포항공과대학교 ,  포항공과대학교 산학협력단

Inventor： 전경훈 ,  양주열

IPC: H04B7/04